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Mitsuru Aniya
Publication Activity (10 Years)
Years Active: 2008-2015
Publications (10 Years): 0
Top Topics
Delta Sigma Modulators
Bandwidth Requirements
Noise Shaping
Top Venues
ESSCIRC
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Publications
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Xin Meng
,
Jinzhou Cao
,
Tao He
,
Yi Zhang
,
Gabor C. Temes
,
Mitsuru Aniya
,
Kazuki Sobue
,
Koichi Hamashita
A 19.2-mW, 81.6-dB SNDR, 4-MHz bandwidth delta-sigma modulator with shifted loop delays.
ESSCIRC
(2015)
Omid Rajaee
,
Seiji Takeuchi
,
Mitsuru Aniya
,
Koichi Hamashita
,
Un-Ku Moon
Low-OSR Over-Ranging Hybrid ADC Incorporating Noise-Shaped Two-Step Quantizer.
IEEE J. Solid State Circuits
46 (11) (2011)
Sanghyeon Lee
,
Jeongseok Chae
,
Mitsuru Aniya
,
Seiji Takeuchi
,
Koichi Hamashita
,
Pavan Kumar Hanumolu
,
Gabor C. Temes
A double-sampled low-distortion cascade ΔΣ modulator with an adder/integrator for WLAN application.
CICC
(2011)
Jeongseok Chae
,
Sanghyeon Lee
,
Mitsuru Aniya
,
Seiji Takeuchi
,
Koichi Hamashita
,
Pavan Kumar Hanumolu
,
Gabor C. Temes
A 63 dB 16 mW 20 MHz BW double-sampled ΔΣs analog-to-digital converter with an embedded-adder quantizer.
CICC
(2010)
Omid Rajaee
,
Tawfiq Musah
,
Nima Maghari
,
Seiji Takeuchi
,
Mitsuru Aniya
,
Koichi Hamashita
,
Un-Ku Moon
Design of a 79 dB 80 MHz 8X-OSR Hybrid Delta-Sigma/Pipelined ADC.
IEEE J. Solid State Circuits
45 (4) (2010)
Kyehyung Lee
,
Jeongseok Chae
,
Mitsuru Aniya
,
Koichi Hamashita
,
Kaoru Takasuka
,
Seiji Takeuchi
,
Gabor C. Temes
A Noise-Coupled Time-Interleaved ΔΣ ADC with 4.2MHz BW, -98dB THD, and 79dB SNDR.
ISSCC
(2008)
Kyehyung Lee
,
Jeongseok Chae
,
Mitsuru Aniya
,
Koichi Hamashita
,
Kaoru Takasuka
,
Seiji Takeuchi
,
Gabor C. Temes
A Noise-Coupled Time-Interleaved Delta-Sigma ADC With 4.2 MHz Bandwidth, -98 dB THD, and 79 dB SNDR.
IEEE J. Solid State Circuits
43 (12) (2008)