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A 63 dB 16 mW 20 MHz BW double-sampled ΔΣs analog-to-digital converter with an embedded-adder quantizer.

Jeongseok ChaeSanghyeon LeeMitsuru AniyaSeiji TakeuchiKoichi HamashitaPavan Kumar HanumoluGabor C. Temes
Published in: CICC (2010)
Keyphrases
  • delta sigma
  • noise shaping
  • analog to digital converter
  • high speed
  • image coding
  • error diffusion
  • power consumption
  • embedded systems
  • data flow
  • image compression
  • coding scheme
  • real time
  • image quality