Michael A. Turi

Publication Activity (10 Years)

Years Active: 2008-2020
Publications (10 Years): 6

Top Topics

Inversely Proportional

Random Access Memory

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

ACM Great Lakes Symposium on VLSI

Publications

Michael A. Turi, José G. Delgado-Frias
Effective Low Leakage 6T and 8T FinFET SRAMs: Using Cells With Reverse-Biased FinFETs, Near-Threshold Operation, and Power Gating. IEEE Trans. Circuits Syst. II Express Briefs (4) (2020)
Michael A. Turi
Scripts for Easier Use of Spice (SEUS): A Perl script package for simulating and creating batches of circuit netlists for Monte Carlo simulations when using Ngspice or Ngspice-based simulators. J. Open Source Softw. 5 (53) (2020)
Michael A. Turi, José G. Delgado-Frias
and near-threshold performance of 8T FinFET SRAM cells. Integr. 57 (2017)
Ahmed S. Sajit, Michael A. Turi
SEU tolerance of FinFET 6T SRAM, 8T SRAM and DICE memory cells. CCWC (2017)
Michael A. Turi, José G. Delgado-Frias
An implemented, initialization algorithm for many-dimension, Monte Carlo circuit simulations using Spice. CCWC (2017)
José G. Delgado-Frias, Zhe Zhang, Michael A. Turi
Near-threshold CNTFET SRAM cell design with removed metallic CNT tolerance. ISCAS (2015)
Michael A. Turi, José G. Delgado-Frias
An evaluation of 6T and 8T FinFET SRAM cell leakage currents. MWSCAS (2014)
Colby M. Gerik, Michael A. Turi, José G. Delgado-Frias
FinFET 3T and 3T1D dynamic RAM cells. MWSCAS (2012)
Zhe Zhang, Michael A. Turi, José G. Delgado-Frias
SRAM leakage in CMOS, FinFET and CNTFET technologies: leakage in 8t and 6t sram cells. ACM Great Lakes Symposium on VLSI (2012)
José G. Delgado-Frias, Zhe Zhang, Michael A. Turi
Low power SRAM cell design for FinFET and CNTFET technologies. Green Computing Conference (2010)
Michael A. Turi, José G. Delgado-Frias
Decreasing energy consumption in address decoders by means of selective precharge schemes. Microelectron. J. 40 (11) (2009)
Michael A. Turi, José G. Delgado-Frias
High-Performance Low-Power Selective Precharge Schemes for Address Decoders. IEEE Trans. Circuits Syst. II Express Briefs (9) (2008)
Michael A. Turi, José G. Delgado-Frias
High-performance low-power AND and Sense-Amp address decoders with selective precharging. ISCAS (2008)