Mehrdad Majzoobi

Publication Activity (10 Years)

Years Active: 2008-2016
Publications (10 Years): 1

Top Topics

Automated Design

Password Authentication

Top Venues

IACR Cryptol. ePrint Arch.

IEEE Trans. Multi Scale Comput. Syst.

IEEE Symposium on Security and Privacy Workshops

Publications

Siam U. Hussain, Mehrdad Majzoobi, Farinaz Koushanfar
A Built-in-Self-Test Scheme for Online Evaluation of Physical Unclonable Functions and True Random Number Generators. IEEE Trans. Multi Scale Comput. Syst. 2 (1) (2016)
Mehrdad Majzoobi, Akshat Kharaya, Farinaz Koushanfar, Srinivas Devadas
Automated Design, Implementation, and Evaluation of Arbiter-based PUF on FPGA using Programmable Delay Lines. IACR Cryptol. ePrint Arch. 2014 (2014)
Siam U. Hussain, Sudha Yellapantula, Mehrdad Majzoobi, Farinaz Koushanfar
BIST-PUF: online, hardware-based evaluation of physically unclonable circuit identifiers. ICCAD (2014)
Ulrich Rührmair, Xiaolin Xu, Jan Sölter, Ahmed Mahmoud, Mehrdad Majzoobi, Farinaz Koushanfar, Wayne P. Burleson
Efficient Power and Timing Side Channels for Physical Unclonable Functions. CHES (2014)
Masoud Rostami, Mehrdad Majzoobi, Farinaz Koushanfar, Dan S. Wallach, Srinivas Devadas
Robust and Reverse-Engineering Resilient PUF Authentication and Key-Exchange by Substring Matching. IEEE Trans. Emerg. Top. Comput. 2 (1) (2014)
Mehrdad Majzoobi, Joonho Kong, Farinaz Koushanfar
Low-power resource binding by postsilicon customization. ACM Trans. Design Autom. Electr. Syst. 18 (2) (2013)
Ahmed Mahmoud, Ulrich Rührmair, Mehrdad Majzoobi, Farinaz Koushanfar
Combined Modeling and Side Channel Attacks on Strong PUFs. IACR Cryptol. ePrint Arch. 2013 (2013)
Mehrdad Majzoobi, Masoud Rostami, Farinaz Koushanfar, Dan S. Wallach, Srinivas Devadas
Slender PUF Protocol: A Lightweight, Robust, and Secure Authentication by Substring Matching. IEEE Symposium on Security and Privacy Workshops (2012)
Mehrdad Majzoobi, Farinaz Koushanfar
Time-Bounded Authentication of FPGAs. IEEE Trans. Inf. Forensics Secur. 6 (3-2) (2011)
Eva L. Dyer, Mehrdad Majzoobi, Farinaz Koushanfar
Hybrid modeling of non-stationary process variations. DAC (2011)
Mehrdad Majzoobi, Golsa Ghiaasi, Farinaz Koushanfar, Sani R. Nassif
Ultra-low power current-based PUF. ISCAS (2011)
Mehrdad Majzoobi, Farinaz Koushanfar, Srinivas Devadas
FPGA-Based True Random Number Generation Using Circuit Metastability with Adaptive Feedback Control. CHES (2011)
Mehrdad Majzoobi, Farinaz Koushanfar, Srinivas Devadas
FPGA PUF using programmable delay lines. WIFS (2010)
Mehrdad Majzoobi, Eva L. Dyer, Ahmed Elnably, Farinaz Koushanfar
Rapid FPGA delay characterization using clock synthesis and sparse sampling. ITC (2010)
Farinaz Koushanfar, Mehrdad Majzoobi, Miodrag Potkonjak
Nonparametric combinatorial regression for shape constrained modeling. IEEE Trans. Signal Process. 58 (2) (2010)
Mehrdad Majzoobi, Ahmed Elnably, Farinaz Koushanfar
FPGA Time-Bounded Unclonable Authentication. Information Hiding (2010)
Mehrdad Majzoobi, Farinaz Koushanfar, Miodrag Potkonjak
Techniques for Design and Implementation of Secure Reconfigurable PUFs. ACM Trans. Reconfigurable Technol. Syst. 2 (1) (2009)
Mehrdad Majzoobi, Farinaz Koushanfar, Miodrag Potkonjak
Testing Techniques for Hardware Security. ITC (2008)
Mehrdad Majzoobi, Farinaz Koushanfar, Miodrag Potkonjak
Lightweight secure PUFs. ICCAD (2008)