Rapid FPGA delay characterization using clock synthesis and sparse sampling.
Mehrdad MajzoobiEva L. DyerAhmed ElnablyFarinaz KoushanfarPublished in: ITC (2010)
Keyphrases
- sparse sampling
- high speed
- fpga device
- clock frequency
- power consumption
- real time
- hardware implementation
- field programmable gate array
- low power
- low cost
- program synthesis
- critical path
- fpga implementation
- search algorithm
- real time image processing
- power reduction
- hardware architecture
- low power consumption
- power dissipation
- search space
- reinforcement learning