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Mayur Agarwal
ORCID
Publication Activity (10 Years)
Years Active: 2016-2021
Publications (10 Years): 4
Top Topics
Floating Point
Micron Cmos
Floating Point Arithmetic
Modular Design
Top Venues
IEEE Trans. Circuits Syst. I Regul. Pap.
Microelectron. J.
IET Circuits Devices Syst.
IEEE Trans. Very Large Scale Integr. Syst.
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Publications
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Jyoti Kandpal
,
Abhishek Tomar
,
Mayur Agarwal
Design and implementation of 20-T hybrid full adder for high-performance arithmetic applications.
Microelectron. J.
115 (2021)
Jyoti Kandpal
,
Abhishek Tomar
,
Mayur Agarwal
,
Kamal Kumar Sharma
High-Speed Hybrid-Logic Full Adder Using High-Performance 10-T XOR-XNOR Cell.
IEEE Trans. Very Large Scale Integr. Syst.
28 (6) (2020)
Mayur Agarwal
,
Arijit De
,
Swapna Banerjee
An IEEE Single Precision Floating Point Arithmetic-Based Apodization Architecture for Portable Ultrasound Imaging System.
IEEE Trans. Circuits Syst. I Regul. Pap.
(6) (2019)
Mayur Agarwal
,
Arijit De
,
Swapna Banerjee
Architecture of a real-time delay calculator for digital beamforming in ultrasound system.
IET Circuits Devices Syst.
10 (4) (2016)