Markus Schwiegershausen

Publication Activity (10 Years)

Years Active: 1991-1997
Publications (10 Years): 0

University of Hanover (PHD)

Education History

University of Hanover

PHD

Publications

Carsten Reuter, Markus Schwiegershausen, Peter Pirsch
Heterogeneous Multiprocessor Scheduling and Allocation using Evolutionary Algorithms. ASAP (1997)
Tien-Toan Do, Holger Kropp, Markus Schwiegershausen, Peter Pirsch
Implementation of pipelined multipliers on Xilinx FPGAs. FPL (1997)
Holger Kropp, Markus Schwiegershausen, Peter Pirsch
A CAD tool for the optimization of video signal processor architectures. ICASSP (1996)
Markus Schwiegershausen, Holger Kropp, Peter Pirsch
A system level HW/SW partitioning and optimization tool. EURO-DAC (1996)
Markus Schwiegershausen, Peter Pirsch
A system level design methodology for the optimization of heterogeneous multiprocessors. ISSS (1995)
Markus Schwiegershausen, Peter Pirsch
A formal approach for the optimization of heterogeneous multiprocessors for complex image processing schemes. EURO-DAC (1995)
Mirjam Schönfeld, Jens Franzen, Markus Schwiegershausen, Peter Pirsch, Uwe Vehlies, Andreas Münzner
The LISA design environment for the synthesis of array processors including memories for the data transfer and fault tolerance by reconfiguration and coding techniques. J. VLSI Signal Process. 11 (1-2) (1995)
Mirjam Schönfeld, Markus Schwiegershausen, Peter Pirsch
Synthesis of intermediate memories for the data supply to processor arrays. Algorithms and Parallel VLSI Architectures (1991)
Mirjam Schönfeld, Markus Schwiegershausen, Peter Pirsch
Synthesis of Intermediate Memories needed for the Data Supply to Processor Arrays. VLSI (1991)

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Publication Activity (10 Years)

Markus Schwiegershausen