Mamoru Kitamura

Publication Activity (10 Years)

Years Active: 1994-1994
Publications (10 Years): 0

Publications

Yasuhiro Takai, Mamoru Nagase, Mamoru Kitamura, Yasuji Koshikawa, Naoyuki Yoshida, Yasuaki Kobayashi, Takashi Obara, Yukio Fukuzo, Hiroshi Watanabe
250 Mbyte/s synchronous DRAM using a 3-stage-pipelined architecture. IEEE J. Solid State Circuits 29 (4) (1994)