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Mamoru Ishizaka
ORCID
Publication Activity (10 Years)
Years Active: 2018-2021
Publications (10 Years): 3
Top Topics
Safety Critical
High Speed
Analog Vlsi
Fault Tolerant
Top Venues
ATS
J. Electron. Test.
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Publications
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Michihiro Shintani
,
Mamoru Ishizaka
,
Michiko Inoue
Robust Fault-Tolerant Design Based on Checksum and On-Line Testing for Memristor Neural Network.
ATS
(2021)
Mamoru Ishizaka
,
Michihiro Shintani
,
Michiko Inoue
Area-Efficient and Reliable Error Correcting Code Circuit Based on Hybrid CMOS/Memristor Circuit.
J. Electron. Test.
36 (4) (2020)
Mamoru Ishizaka
,
Michihiro Shintani
,
Michiko Inoue
Area-Efficient and Reliable Hybrid CMOS/Memristor ECC Circuit for ReRAM Storage.
ATS
(2018)