Login / Signup

Area-Efficient and Reliable Error Correcting Code Circuit Based on Hybrid CMOS/Memristor Circuit.

Mamoru IshizakaMichihiro ShintaniMichiko Inoue
Published in: J. Electron. Test. (2020)
Keyphrases
  • circuit design
  • high speed
  • analog vlsi
  • delay insensitive
  • error correcting codes
  • low voltage
  • cmos technology
  • low power
  • quantum mechanics