Müstak E. Yalçin

Publication Activity (10 Years)

Years Active: 1999-2024
Publications (10 Years): 20

Top Topics

Image Encryption

Chaotic Systems

Top Venues

Int. J. Bifurc. Chaos

Publications

Nafiseh Hematpour, Fatemeh Gharari, Berna Ors, Müstak E. Yalçin
A novel S-box design based on quantum tent maps and fractional stochastic models with an application in image encryption. Soft Comput. 28 (7) (2024)
Yunus Emre Eryilmaz, Hasan Erdem Yantir, Müstak E. Yalçin
An Open-Source eFPGA-based SoC Design for Computation Acceleration. ICECS (2023)
Bilgehan Miraç Baki, Müstak E. Yalçin
FPGA-Based Implementation of a Matched Filter for Acoustic Shooter Localization System. SIU (2023)
Mohammed Salah Bouridah, Toufik Bouden, Müstak E. Yalçin
Delayed outputs fractional-order hyperchaotic systems synchronization for images encryption. Multim. Tools Appl. 80 (10) (2021)
Khaled Benkouider, Toufik Bouden, Müstak E. Yalçin, Sundarapandian Vaidyanathan
A new family of 5D, 6D, 7D and 8D hyperchaotic systems from the 4D hyperchaotic Vaidyanathan system, the dynamic analysis of the 8D hyperchaotic system with six positive Lyapunov exponents and an application to secure communication design. Int. J. Model. Identif. Control. 35 (3) (2020)
Khaled Benkouider, Toufik Bouden, Sundarapandian Vaidyanathan, Müstak E. Yalçin
A new family of 9D and 10D hyperchaotic systems from the 8D hyperchaotic Benkouider system, the bifurcation analysis of the 10D hyperchaotic system, circuit design and an application to secure voice communication. Int. J. Model. Identif. Control. 36 (4) (2020)
B. Hakan Sezgin, Mustafa Direk, Mert Külte, Mehmet Eskin, M. Esat Sudaduran, Emrah Abtioglu, Mustafa Tanis, Müstak E. Yalçin
GEZSAN - Real Time Spectrum Analyzer. SIU (2020)
Emre Göncü, Abdulkadir Koçdogan, Müstak E. Yalçin
A High Speed True Random Number Generator with Cellular Automata with Random Memory. ISCAS (2018)
Ramazan Yeniceri, Alptekin Vardar, Erdem Cil, Latif Akcay, Emre Goncu, Müstak E. Yalçin
A chaotic time-delay system based digital RNG and integrated autonomous test suite. ECCTD (2017)
Emre Goncu, Müstak E. Yalçin
Cellular Automata with Random Memory and Its Implementations. Int. J. Bifurc. Chaos 27 (5) (2017)
Emrah Abtioglu, Ramazan Yeniceri, Burak Govem, Emre Goncu, Müstak E. Yalçin, Gökay Saldamli
Partially Reconfigurable IP Protection System with Ring Oscillator Based Physically Unclonable Functions. NGCAS (2017)
Ramazan Yeniceri, Alptekin Vardar, Müstak E. Yalçin
Full digital implementation of a chaotic time-delay sampled-data system. ISCAS (2017)
Erdem Kose, Müstak E. Yalçin
Emulating CNN with template learning on FPGA. ECCTD (2017)
Emre Goncu, Müstak E. Yalçin
Realization of elementary cellular automata with random minimal memory. ECCTD (2017)
Ramazan Yeniçeri, Müstak E. Yalçin
Asynchronous delay doubler and binary low-pass filter for a time-delay chaotic circuit. Int. J. Circuit Theory Appl. 44 (6) (2016)
Ramazan Yeniçeri, Müstak E. Yalçin
Multi-scroll chaotic attractors from a generalized time-delay sampled-data system. Int. J. Circuit Theory Appl. 44 (6) (2016)
Baris Karakaya, Ramazan Yeniceri, Müstak E. Yalçin
Wave computer core using fixed-point arithmetic. ISCAS (2015)
Sahin Bas, Müstak E. Yalçin
Key generation and license authentication using physical unclonable functions. SIU (2015)
Emrah Abtioglu, Ramazan Yeniceri, Müstak E. Yalçin
Cellular network of networks on dynamically partial reconfigurable FPGA. ECCTD (2015)
Ramazan Yeniçeri, Selçuk Kilinç, Müstak E. Yalçin
Attack on a Chaos-Based Random Number Generator Using Anticipating Synchronization. Int. J. Bifurc. Chaos 25 (2) (2015)
Müstak E. Yalçin, Ramazan Yeniceri, Serdar Özoguz
A Chaotic Time-Delay Sampled-Data System and Its Implementation. Int. J. Bifurc. Chaos 24 (3) (2014)
O. Levent Savkay, Evren Cesur, Nerhun Yildiz, Müstak E. Yalçin, Vedat Tavsanoglu
Realization of processing blocks of CNN based CASA system on CPU and FPGA. ISCAS (2014)
Melike Atay, Müstak E. Yalçin
Digital design of skeletonization. SIU (2014)
Ramazan Yeniceri, Buse Ustaoglu, Müstak E. Yalçin
Throughput enhancement for a new time-delay sampled-data system based True Random Bit Generator. ECCTD (2013)
O. Levent Savkay, Nerhun Yildiz, Evren Cesur, Müstak E. Yalçin, Vedat Tavsanoglu
Realization of preprocessing blocks of CNN based CASA system on FPGA. ECCTD (2013)
Ramazan Yeniceri, Müstak E. Yalçin
The Doppler Effect with input driven autowaves. ECCTD (2013)
Melike Atay, Müstak E. Yalçin
A parallelized distance transformation architecture for FPGAs. ECCTD (2013)
Volkan Kilic, Müstak E. Yalçin
An active wave computing based path finding approach for 3-D environment. ISCAS (2011)
Selçuk Kilinç, Müstak E. Yalçin, Serdar Özoguz
Multiscroll Chaotic attractors from a Hysteresis Based Time-Delay Differential equation. Int. J. Bifurc. Chaos 20 (10) (2010)
Ramazan Yeniceri, Müstak E. Yalçin
An emulated digital wave computer core implementation. ECCTD (2009)
Selçuk Kilinç, Müstak E. Yalçin, Serdar Özoguz
Synchronization of first-order time-delay systems generating n-scroll chaotic attractors. ISCAS (2008)
Müstak E. Yalçin
Increasing the Entropy of a Random Number Generator Using n-scroll Chaotic attractors. Int. J. Bifurc. Chaos 17 (12) (2007)
Müstak E. Yalçin, Johan A. K. Suykens
Spatiotemporal Pattern Formation on the ACE16K CNN Chip. Int. J. Bifurc. Chaos 16 (5) (2006)
Müstak E. Yalçin, Johan A. K. Suykens, Joos Vandewalle
Multi-scroll and hypercube attractors from Josephson junctions. ISCAS (2006)
Müstak E. Yalçin, Johan A. K. Suykens, Joos Vandewalle
Spatiotemporal pattern formation in the ACE16k CNN chip. ISCAS (6) (2005)
Müstak E. Yalçin, Joos Vandewalle, Paolo Arena, Adriano Basile, Luigi Fortuna
Watermarking on CNN-UM for image and video authentication. Int. J. Circuit Theory Appl. 32 (6) (2004)
Samuel Xavier de Souza, Müstak E. Yalçin, Johan A. K. Suykens, Joos Vandewalle
Toward CNN chip-specific robustness. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2004)
Müstak E. Yalçin, Johan A. K. Suykens, Joos Vandewalle
A double scroll based true random bit generator. ISCAS (4) (2004)
Müstak E. Yalçin, Johan A. K. Suykens, Joos Vandewalle
True random bit generation from a double-scroll attractor. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2004)
Johan A. K. Suykens, Müstak E. Yalçin, Joos Vandewalle
Coupled chaotic simulated annealing processes. ISCAS (3) (2003)
F. Acar Savaci, Müstak E. Yalçin, Cüneyt Güzelis
Steady-State Analysis of Nonlinearly Coupled Chua's Circuits with Periodic Input. Int. J. Bifurc. Chaos 13 (11) (2003)
Müstak E. Yalçin, Johan A. K. Suykens, Joos Vandewalle, Serdar Özoguz
Families of scroll Grid attractors. Int. J. Bifurc. Chaos 12 (1) (2002)
Müstak E. Yalçin, Johan A. K. Suykens, Joos Vandewalle
Master-Slave Synchronization of Lur'e Systems with Time-Delay. Int. J. Bifurc. Chaos 11 (6) (2001)
Müstak E. Yalçin, Johan A. K. Suykens, Joos Vandewalle
On the realization of n-scroll attractors. ISCAS (5) (1999)