Liming Xiu

Publication Activity (10 Years)

Years Active: 2000-2024
Publications (10 Years): 12

Top Topics

Stochastic Optimization Problems

Random Number Generator

Parallel Hardware

Top Venues

IEEE Trans. Ind. Electron.

IEEE Trans. Very Large Scale Integr. Syst.

IEEE Trans. Instrum. Meas.

Publications

Xiangye Wei, Liming Xiu, Yimao Cai
A Perspective of Using Frequency-Mixing as Entropy in Random Number Generation for Portable Hardware Cybersecurity IP. IEEE Trans. Inf. Forensics Secur. 19 (2024)
Yiwen Li, Liming Xiu, Xiangye Wei, Shuisheng Lin, Chenglong Li, Hui Zhang
Using All-Digital On-Chip Syntonistor to Compensate Clock Frequency Error in Network Time Synchronization for Accuracy Reaching to Sub-µs Range. IEEE Trans. Ind. Electron. 70 (10) (2023)
Xiangye Wei, Liming Xiu
A VLSI Digital Circuit Platform for Performing Deterministic Stochastic Computing in the Time Dimension Using Fraction Operations on Rational Numbers. IEEE Trans. Emerg. Top. Comput. 11 (1) (2023)
Xiangye Wei, Liming Xiu
A New Perspective of Inscribing Temporal Encryption on Spatial MPV Imprints for PUF Design. SOCC (2022)
Xiangye Wei, Liming Xiu
A New Perspective of Flexible Clocking Ideology for Driving and Devising Circuits in Emerging Resource-Constrained Applications. IEEE Access 10 (2022)
Chenglong Li, Shuisheng Lin, Yiwen Li, Hui Zhang, Xiangye Wei, Liming Xiu
A Method of Low-Cost Pure-Digital GPS Disciplined Clock for Improving Frequency Accuracy and Steering Frequency Through TAF-DPS Frequency Synthesizer. IEEE Trans. Instrum. Meas. 70 (2021)
Xiangye Wei, Liming Xiu
An All Digital Highly Programable TAF-DPS Based True Random Number Generator Working on Principles of Frequency-Mixing and Frequency-Tracking. ISCAS (2020)
Liming Xiu, Xiangye Wei
A 0.02 Ppb/Step Wide Range DCXO Based on Time-Average-Frequency: Demonstration on FPGA. ISCAS (2019)
Liming Xiu, Xiangye Wei, Yuhai Ma
TAF-FLL for Digital Applications: Demonstration of the Principle of a Frequency-Locked Loop Built on Time-Average-Frequency. IEEE Trans. Very Large Scale Integr. Syst. 27 (3) (2019)
Liming Xiu, Pao-Lung Chen
A Reconfigurable TAF-DPS Frequency Synthesizer on FPGA Achieving 2 ppb Frequency Granularity and Two-Cycle Switching Speed. IEEE Trans. Ind. Electron. 64 (2) (2017)
Liming Xiu
All digital FPGA-implementable time-average-frequency direct period synthesis for IoT applications. ISCAS (2017)
Liming Xiu
Direct Period Synthesis for Achieving Sub-PPM Frequency Resolution Through Time Average Frequency: The Principle, The Experimental Demonstration, and Its Application in Digital Communication. IEEE Trans. Very Large Scale Integr. Syst. 23 (7) (2015)
Liming Xiu, Win-Ting Lin, Tsung-Ta Lee
Flying-Adder Fractional Divider Based Integer-N PLL: 2nd Generation FAPLL as On-Chip Frequency Generator for SoC. IEEE J. Solid State Circuits 48 (2) (2013)
Liming Xiu, Kun-Ho Lin, Ming Lin
The Impact of Input-Mismatch on Flying-Adder Direct Period Synthesizer Output Jitter. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2012)
Liming Xiu, Ming Lin, Hong Jiang
A Storage-Based Carry Randomization Technique for Spurs Reduction in Flying-Adder Frequency Synthesizer. IEEE Trans. Circuits Syst. II Express Briefs (6) (2011)
Ping Gui, Zheng Gao, Chen-Wei Huang, Liming Xiu
The Effects of Flying-Adder Clocks on Digital-to-Analog Converters. IEEE Trans. Circuits Syst. II Express Briefs (1) (2010)
Liming Xiu, Chen-Wei Huang, Ping Gui
Analysis of Harmonic Energy Distribution Portfolio for Digital-to-Frequency Converters. IEEE Trans. Instrum. Meas. 59 (10) (2010)
Liming Xiu, Chen-Wei Huang, Ping Gui
A comparative study between Fractional-N PLL and Flying-Adder PLL. ISCAS (2010)
Liming Xiu, Chen-Wei Huang, Ping Gui
Simulation Study of Time-Average-Frequency based Clock Signal Driving Systems with Embedded Digital-to-Analog Converters. ISCAS (2009)
Liming Xiu
A Fast and Power-Area-Efficient Accumulator for Flying-Adder Frequency Synthesizer. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2009)
Chen-Wei Huang, Ping Gui, Liming Xiu
A Wide-tuning-range and Reduced-fractional-spurs Synthesizer Combining Sigma-Delta Fractional-N and Integer Flying-Adder Techniques. ISCAS (2009)
Liming Xiu
A Novel DCXO Module for Clock Synchronization in MPEG2 Transport System. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2008)
Mingjun Liu, Liming Xiu, Guangfeng Jia, Yuehui Chen
Crack Fault Diagnosis Based on MEP Based Neural Network. ISCSCT (1) (2008)
Liming Xiu
A Flying-Adder PLL technique enabling novel approaches for video/graphic applications. IEEE Trans. Consumer Electron. 54 (2) (2008)
Liming Xiu
A "Flying-Adder" On-Chip Frequency Generator for Complex SoC Environment. IEEE Trans. Circuits Syst. II Express Briefs (12) (2007)
Liming Xiu, Zhihong You
A "Flying-Adder" frequency synthesis architecture of reducing VCO stages. IEEE Trans. Very Large Scale Integr. Syst. 13 (2) (2005)
Liming Xiu, Wen Li, J. Meiners, R. Padakanti
A novel all-digital PLL with software adaptive filter. IEEE J. Solid State Circuits 39 (3) (2004)
Liming Xiu, Zhihong You
A new frequency synthesis method based on "flying-adder" architecture. IEEE Trans. Circuits Syst. II Express Briefs 50 (3) (2003)
Liming Xiu, Zhihong You
A "flying-adder" architecture of frequency and phase synthesis with scalability. IEEE Trans. Very Large Scale Integr. Syst. 10 (5) (2002)
Hugh Mair, Liming Xiu
An architecture of high-performance frequency and phase synthesis. IEEE J. Solid State Circuits 35 (6) (2000)