Flying-Adder Fractional Divider Based Integer-N PLL: 2nd Generation FAPLL as On-Chip Frequency Generator for SoC.
Liming XiuWin-Ting LinTsung-Ta LeePublished in: IEEE J. Solid State Circuits (2013)
Keyphrases
- high speed
- low power
- analog vlsi
- low cost
- single chip
- high density
- power dissipation
- vlsi design
- application specific integrated circuits
- data flow
- generation process
- physical design
- logic circuits
- fractional order
- hardware and software
- pseudorandom
- vision system
- frequency distribution
- data streams
- hardware software co design
- phase locked loop