Kristof Du Bois

Publication Activity (10 Years)

Years Active: 2011-2024
Publications (10 Years): 11

Top Topics

Top Venues

IEEE Comput. Archit. Lett.

Publications

Stijn Eyerman, Wim Heirman, Kristof Du Bois, Ibrahim Hur
Accurate and Scalable Many-Node Simulation. CoRR (2024)
Sriram Aananthakrishnan, Shamsul Abedin, Vincent Cavé, Fabio Checconi, Kristof Du Bois, Stijn Eyerman, Joshua B. Fryman, Wim Heirman, Jason Howard, Ibrahim Hur, Samkit Jain, Marek M. Landowski, Kevin Ma, Jarrod A. Nelson, Robert Pawlowski, Fabrizio Petrini, Sebastian Szkoda, Sanjaya Tayal, Jesmin Jahan Tithi, Yves Vandriessche
The Intel Programmable and Integrated Unified Memory Architecture Graph Analytics Processor. IEEE Micro 43 (5) (2023)
Wim Heirman, Stijn Eyerman, Kristof Du Bois, Ibrahim Hur
Automatic Sublining for Efficient Sparse Memory Accesses. ACM Trans. Archit. Code Optim. 18 (3) (2021)
Wim Heirman, Stijn Eyerman, Kristof Du Bois, Ibrahim Hur
RIO: ROB-Centric In-Order Modeling of Out-of-Order Processors. IEEE Comput. Archit. Lett. 20 (1) (2021)
Sriram Aananthakrishnan, Nesreen K. Ahmed, Vincent Cavé, Marcelo Cintra, Yigit Demir, Kristof Du Bois, Stijn Eyerman, Joshua B. Fryman, Ivan Ganev, Wim Heirman, Hans-Christian Hoppe, Jason Howard, Ibrahim Hur, Midhunchandra Kodiyath, Samkit Jain, Daniel S. Klowden, Marek M. Landowski, Laurent Montigny, Ankit More, Przemyslaw Ossowski, Robert Pawlowski, Nick Pepperling, Fabrizio Petrini, Mariusz Sikora, Balasubramanian Seshasayee, Shaden Smith, Sebastian Szkoda, Sanjaya Tayal, Jesmin Jahan Tithi, Yves Vandriessche, Izajasz P. Wrosz
PIUMA: Programmable Integrated Unified Memory Architecture. CoRR (2020)
Stijn Eyerman, Wim Heirman, Yigit Demir, Kristof Du Bois, Ibrahim Hur
Projecting Performance for PIUMA using Down-Scaled Simulation. HPEC (2020)
Stijn Eyerman, Wim Heirman, Kristof Du Bois, Joshua B. Fryman, Ibrahim Hur
Many-core graph workload analysis. SC (2018)
Stijn Eyerman, Wim Heirman, Kristof Du Bois, Ibrahim Hur
Extending the Performance Analysis Tool Box: Multi-stage CPI Stacks and FLOPS Stacks. ISPASS (2018)
Wim Heirman, Kristof Du Bois, Yves Vandriessche, Stijn Eyerman, Ibrahim Hur
Near-side prefetch throttling: adaptive prefetching for high-performance many-core processors. PACT (2018)
Stijn Eyerman, Wim Heirman, Kristof Du Bois, Ibrahim Hur
Multi-Stage CPI Stacks. IEEE Comput. Archit. Lett. 17 (1) (2018)
Jennifer B. Sartor, Kristof Du Bois, Stijn Eyerman, Lieven Eeckhout
Analyzing the scalability of managed language applications with speedup stacks. ISPASS (2017)
Kristof Du Bois, Stijn Eyerman, Jennifer B. Sartor, Lieven Eeckhout
Criticality stacks: identifying critical threads in parallel programs using synchronization behavior. ISCA (2013)
Kristof Du Bois, Jennifer B. Sartor, Stijn Eyerman, Lieven Eeckhout
Bottle graphs: visualizing scalability bottlenecks in multi-threaded applications. OOPSLA (2013)
Kristof Du Bois, Stijn Eyerman, Lieven Eeckhout
Per-thread cycle accounting in multicore processors. ACM Trans. Archit. Code Optim. 9 (4) (2013)
Stijn Eyerman, Kristof Du Bois, Lieven Eeckhout
Speedup stacks: Identifying scaling bottlenecks in multi-threaded applications. ISPASS (2012)
Kristof Du Bois, Tim Schaeps, Stijn Polfliet, Frederick Ryckbosch, Lieven Eeckhout
SWEEP: evaluating computer system energy efficiency using synthetic workloads. HiPEAC (2011)