Kohei Hosokawa

Publication Activity (10 Years)

Years Active: 2004-2024
Publications (10 Years): 13

Top Topics

Environmentally Friendly

Generalized Hough Transform

Spatial Relations

Optical Networks

Top Venues

Publications

Hitoshi Takeshita, Yusuke Shimomura, Kohei Hosokawa
Transmission capacity expansion using bidirectional multicore EDFA under bidirectional signal assignment. OFC (2024)
Yusuke Sasaki, Masaki Sato, Hidemi Noguchi, Kohei Hosokawa
State-of-Polarization Monitoring Employing Optical Supervisory Channel Enabling Instantaneous Fluctuation Detection and Localization. OFC (2024)
Daisuke Saito, Yojiro Mori, Kohei Hosokawa, Shigeyuki Yanagimachi, Hiroshi Hasegawa
Cost-Effective Capacity Enhancement of Survivable Optical Networks by Supplemental Band Expansion and Backup Resource Sharing. OFC (2024)
Kyosuke Nakada, Hitoshi Takeshita, Yuki Kuno, Yusuke Matsuno, Itsuki Urashima, Yusuke Shimomura, Yuji Hotta, Tsubasa Sasaki, Yudai Uchida, Kohei Hosokawa, Ryohei Otowa, Rika Tahara, Emmanuel Le Taillandier de Gabory, Yasuki Sakurai, Ryuichi Sugizaki, Masahiko Jinno
Single Multicore-Fiber Bidirectional Spatial Channel Network Based on Spatial Cross-Connect and Multicore EDFA Efficiently Accommodating Asymmetric Traffic. OFC (2023)
Kyosuke Nakada, Hitoshi Takeshita, Yuki Kuno, Yusuke Matsuno, Itsuki Urashima, Yusuke Shimomura, Yuji Hotta, Tsubasa Sasaki, Yudai Uchida, Kohei Hosokawa, Ryohei Otowa, Rika Tahara, Emmanuel Le Taillandier de Gabory, Yasuki Sakurai, Ryuichi Sugizaki, Masahiko Jinno
Bidirectional single-multicore-fiber spatial channel network based on a spatial cross-connect and multicore EDFA that efficiently accommodates asymmetric data traffic. JOCN 15 (11) (2023)
Daisuke Saito, Yojiro Mori, Kohei Hosokawa, Shigeyuki Yanagimachi, Hiroshi Hasegawa
Cost-effective Network Capacity Enhancement with Multi-band Virtual Bypass Links. OFC (2023)
Eita Kobayashi, Kohei Hosokawa, Shigeyuki Yanagimachi, Emmanuel Le Taillandier de Gabory
Fast and Compact Node Monitoring System for Multi-Vendor Optical Network. OECC/PSC (2022)
Hitoshi Takeshita, Yusuke Shimomura, Shoma Tateno, Kohei Hosokawa, Emmanuel Le Taillandier de Gabory
Novel Bidirectional Multicore EDFA Based on Twin Turbo Cladding Pumping Using Bidirectional Pumping and Recycling. OECC/PSC (2022)
Hitoshi Takeshita, Kohei Nakamura, Yuushi Matsuo, Takanori Inoue, Daishi Masuda, Tetsuya Hiwatashi, Kohei Hosokawa, Yoshihisa Inada, Emmanuel Le Taillandier de Gabory
First Demonstration of Uncoupled 4-Core Multicore Fiber in a Submarine Cable Prototype with Integrated Multicore EDFA. OFC (2022)
Keiichi Matsumoto, Kohei Hosokawa, Emmanuel Le Taillandier de Gabory
Reduction of Power Consumption of Full C-band WDM Amplification by WDM Sub-banding and SDM Conversion using a High Core Count Multi-Core Amplifier. ECOC (2021)
Yohei Hasegawa, Hidemi Noguchi, Masaki Sato, Kohei Hosokawa, Morihiko Ota
Evaluation of the Link Budget Increase using Error-Tolerant TCPs for Optical Communication in Nonlinear Regime on 200G PM-16QAM Real-time Signal Demodulation. ECOC (2021)
Manabu Arikawa, Kohei Hosokawa, Kazunori Hayashi
Long-Haul WDM/SDM Transmission over Coupled 4-Core Fiber with Coupled 4-Core EDFA and Its MDL Characteristics Estimation. OFC (2021)
Hitoshi Takeshita, Manabu Arikawa, Keiichi Matsumoto, Kohei Hosokawa, Emmanuel Le Taillandier de Gabory
Evaluation of the Signal Amplified by CC-MC-EDFA under Inter-core Crosstalk Using a Scalable SDM/TDM Translation Method. ECOC (2020)
Kiyoshi Fukuchi, Atsufumi Shihavama, Kohei Hosokawa, Wakako Maeda, Hidemi Noguchi, Jun-ichi Abe
Practical techniques for nonlinear compensation and mitigation. OFC (2015)
Kohei Hosokawa, Katsunori Tanaka, Yuichi Nakamura
Efficient Memory Utilization for High-Speed FPGA-Based Hardware Emulators with SDRAMs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2007)
Yuichi Nakamura, Kohei Hosokawa
Fast FPGA-Emulation-Based Simulation Environment for Custom Processors. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2006)
Kohei Hosokawa, Mitsuhiko Yagyu, Akinori Nishihara
Design Method for 2-Channel Signal Word Decomposed Filters with Minimum Output Error and Their Effective VLSI Implementation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (8) (2005)
Yuichi Nakamura, Kohei Hosokawa, Ichiro Kuroda, Ko Yoshikawa, Takeshi Yoshimura
A fast hardware/software co-verification method for system-on-a-chip by using a C/C++ simulator and FPGA emulator with shared register communication. DAC (2004)