A fast hardware/software co-verification method for system-on-a-chip by using a C/C++ simulator and FPGA emulator with shared register communication.
Yuichi NakamuraKohei HosokawaIchiro KurodaKo YoshikawaTakeshi YoshimuraPublished in: DAC (2004)
Keyphrases
- hardware software
- reconfigurable hardware
- verification method
- hardware and software
- field programmable gate array
- hw sw
- embedded systems
- model checking
- low cost
- temporal logic
- hardware design
- high speed
- design methodology
- high performance computing
- multi core processors
- single chip
- parallel computing
- hardware implementation
- computer systems
- gene expression programming
- multithreading
- real time
- efficient implementation
- knowledge base