Karthik Shivashankar

Publication Activity (10 Years)

Years Active: 2010-2023
Publications (10 Years): 3

Top Topics

Natural Language

Dynamic Adaptation

Public Libraries

Enabling Technologies

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Daniel Skryseth, Karthik Shivashankar, Ildikó Pilán, Antonio Martini
Technical Debt Classification in Issue Trackers using Natural Language Processing based on Transformers. TechDebt@ICSE (2023)
Karthik Shivashankar, Antonio Martini
Maintainability Challenges in ML: A Systematic Literature Review. SEAA (2022)
Karthik Shivashankar, Venkat Bakthavatchaalam
Smart Municipal Governance System Using Confluence of Technologies in a Developing Country Scenario. ICEGOV (2021)
Shidhartha Das, Ganesh S. Dasika, Karthik Shivashankar, David M. Bull
A 1 GHz Hardware Loop-Accelerator With Razor-Based Dynamic Adaptation for Energy-Efficient Operation. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2014)
Shidhartha Das, Ganesh S. Dasika, Karthik Shivashankar, David M. Bull
A 1GHz hardware loop-accelerator with razor-based dynamic adaptation for energy-efficient operation. CICC (2013)
David M. Bull, Shidhartha Das, Karthik Shivashankar, Ganesh S. Dasika, Krisztián Flautner, David T. Blaauw
Correction to "A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation". IEEE J. Solid State Circuits 46 (3) (2011)
David M. Bull, Shidhartha Das, Karthik Shivashankar, Ganesh S. Dasika, Krisztián Flautner, David T. Blaauw
A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation. IEEE J. Solid State Circuits 46 (1) (2011)
David M. Bull, Shidhartha Das, Karthik Shivashankar, Ganesh S. Dasika, Krisztián Flautner, David T. Blaauw
A power-efficient 32b ARM ISA processor using timing-error detection and correction for transient-error tolerance and adaptation to PVT variation. ISSCC (2010)