Kaneyoshi Takeshita

Publication Activity (10 Years)

Years Active: 2001-2007
Publications (10 Years): 0

Publications

Takashi Masuda, Hideyuki Suzuki, Hiroshi Iizuka, Akio Igarashi, Kaneyoshi Takeshita, Takayuki Mogi, Takayuki Shoji, Jeremy Chatwin, Iain Butler, Derek Mellor
A 250mW Full-Rate 10Gb/s Transceiver Core in 90nm CMOS Using a Tri-State Binary PD with 100ps Gated Digital Output. ISSCC (2007)
Hajime Nakayama, Pin Su, Chenming Hu, Motoaki Nakamura, Hiroshi Komatsu, Kaneyoshi Takeshita, Yasutoshi Komatsu
Methodology of self-heating free parameter extraction and circuit simulation for SOI CMOS. CICC (2001)