A 250mW Full-Rate 10Gb/s Transceiver Core in 90nm CMOS Using a Tri-State Binary PD with 100ps Gated Digital Output.
Takashi MasudaHideyuki SuzukiHiroshi IizukaAkio IgarashiKaneyoshi TakeshitaTakayuki MogiTakayuki ShojiJeremy ChatwinIain ButlerDerek MellorPublished in: ISSCC (2007)