Jussi Roivainen

Publication Activity (10 Years)

Years Active: 2001-2023
Publications (10 Years): 11

Top Topics

Parallel Algorithm

Update Operations

Top Venues

IPDPS Workshops

Microprocess. Microsystems

J. Supercomput.

Publications

Martti Forsell, Jussi Roivainen, Ville Leppänen, Jesper Larsson Träff
Preliminary Performance and Memory Access Scalability Study of Thick Control Flow Processors. NorCAS (2023)
Martti Forsell, Jussi Roivainen, Ville Leppänen, Jesper Larsson Träff
Realizing multioperations and multiprefixes in Thick Control Flow processors. Microprocess. Microsystems 98 (2023)
Martti Forsell, Sara Nikula, Jussi Roivainen, Ville Leppänen, Jesper Larsson Träff
Performance and programmability comparison of the thick control flow architecture and current multicore processors. J. Supercomput. 78 (3) (2022)
Martti Forsell, Jussi Roivainen, Jesper Larsson Träff
Optimizing Memory Access in TCF Processors with Compute-Update Operations. IPDPS Workshops (2020)
Markku Kiviranta, Ilkka Moilanen, Jussi Roivainen
5G Radar: Scenarios, Numerology and Simulations. ICMCIS (2019)
Martti Forsell, Jussi Roivainen, Ville Leppänen, Jesper Larsson Träff
Implementation of Multioperations in Thick Control Flow Processors. IPDPS Workshops (2018)
Martti Forsell, Jussi Roivainen, Ville Leppänen, Jesper Larsson Träff
Supporting concurrent memory access in TCF processor architectures. Microprocess. Microsystems 63 (2018)
Martti Forsell, Jussi Roivainen, Ville Leppänen
REPLICA MBTAC: multithreaded dual-mode processor. J. Supercomput. 74 (5) (2018)
Martti Forsell, Jussi Roivainen, Ville Leppänen, Jesper Larsson Träff
Supporting concurrent memory access in TCF-aware processor architectures. NORCAS (2017)
Martti Forsell, Jussi Roivainen, Ville Leppänen
The REPLICA on-chip network. NORCAS (2016)
Martti Forsell, Jussi Roivainen, Ville Leppänen
Outline of a Thick Control Flow Architecture. SBAC-PAD (Workshops) (2016)
Martti Forsell, Jussi Roivainen
REPLICA T7-16-128 - A 2048-threaded 16-core 7-FU chained VLIW chip multiprocessor. ACSSC (2014)
Martti Forsell, Jussi Roivainen, Ville Leppänen
Prototyping the MBTAC Processor for the REPLICA CMP. IPDPS Workshops (2014)
Martti Forsell, Jussi Roivainen
Performance, Area and Power Trade-Offs in Mesh-based Emulated Shared Memory CMP Architectures. PDPTA (2008)
Yan Zhang, Jussi Roivainen, Aarne Mämmelä
Clock-Gating in FPGAs: A Novel and Comparative Evaluation. DSD (2006)
Jussi Roivainen, Jukka Rautio
IP-Block Based Integration of Very High Performance WLAN Modem. DSD (2004)
Juha-Pekka Soininen, Antti Pelkonen, Jussi Roivainen
Configurable Memory Organisation for Communication Applications. DSD (2002)
Janne Riihijärvi, Petri Mähönen, Mika J. Saaranen, Jussi Roivainen, Juha-Pekka Soininen
Providing network connectivity for small appliances: a functionally minimized embedded Web server. IEEE Commun. Mag. 39 (10) (2001)