Joycee Mekie

Publication Activity (10 Years)

Years Active: 2004-2024
Publications (10 Years): 61

Top Topics

Error Resilient

Top Venues

Publications

Tom Glint, Manu Awasthi, Joycee Mekie
CANSim: When to Utilize Synchronous and Asynchronous Routers in Large and Complex NoCs. ASPDAC (2024)
Tom Glint, Mithil Pechimuthu, Joycee Mekie
DeepFrack: A Comprehensive Framework for Layer Fusion, Face Tiling, and Efficient Mapping in DNN Hardware Accelerators. DATE (2024)
Monika Pokharia, Kailash Prasad, Ravi S. Hegde, Joycee Mekie
Hybrid CMOS-Memristor Logic for Boosting the Power-Efficiency in Error Tolerant Applications. VLSID (2024)
Kailash Prasad, Neel Shah, Jinay Dagli, Joycee Mekie
SDR-PUF: Sequence-Dependent Reconfigurable SRAM PUF with an Exponential CRP Space. VLSID (2024)
Saketh Gajawada, Aryan Gupta, Kailash Prasad, Joycee Mekie
FP-BMAC: Efficient Approximate Floating-Point Bit-Parallel MAC Processor using IMC. VLSID (2024)
Yathin Kumar Attuluri, Ruchit Chudasama, Kailash Prasad, Joycee Mekie
FP-ATM: A Flexible Floating Point NOR Adder Tree Macro for In-Memory Computing. VLSID (2024)
Vrajesh Patel, Neel Shah, Aravind Krishna, Tom Glint, Abdul Ronak, Joycee Mekie
COMPRIZE: Assessing the Fusion of Quantization and Compression on DNN Hardware Accelerators. VLSID (2024)
Tom Glint, Manu Awasthi, Joycee Mekie
Hardware-Software Co-Design of a Collaborative DNN Accelerator for 3D Stacked Memories with Multi-Channel Data. ASPDAC (2024)
Tom Glint, Aryan Gupta, Daniel Giftson, Gaurav Shah, Vrajesh Patel, Ruchit Chudasama, Sukanya More, Joycee Mekie
Impact of Optimal Design Point on Performance Metrics of DNN accelerators in FPGA. ISPASS (2023)
Monika Pokharia, Ravi S. Hegde, Joycee Mekie
Power-Efficient Approximate Multipliers Leveraging Hybrid CMOS-Memristor Paradigm. APCCAS (2023)
Tom Glint, Chandan Kumar Jha, Manu Awasthi, Joycee Mekie
Analysis of Conventional, Near-Memory, and In-Memory DNN Accelerators. ISPASS (2023)
Sarabjeet Singh, Neelam Surana, Kailash Prasad, Pranjali Jain, Joycee Mekie, Manu Awasthi
HyGain: High-performance, Energy-efficient Hybrid Gain Cell-based Cache Hierarchy. ACM Trans. Archit. Code Optim. 20 (2) (2023)
Tom Glint, Kailash Prasad, Jinay Dagli, Krishil Gandhi, Aryan Gupta, Vrajesh Patel, Neel Shah, Joycee Mekie
Hardware-Software Codesign of DNN Accelerators Using Approximate Posit Multipliers. ASP-DAC (2023)
Kailash Prasad, Aditya Biswas, Arpita Kabra, Joycee Mekie
PIC-RAM: Process-Invariant Capacitive Multiplier Based Analog In Memory Computing in 6T SRAM. DATE (2023)
Chandan Kumar Jha, Ankita Nandi, Joycee Mekie
Single Exact Single Approximate Adders and Single Exact Dual Approximate Adders. IEEE Trans. Very Large Scale Integr. Syst. 31 (7) (2023)
Kailash Prasad, Sai Shubham, Aditya Biswas, Joycee Mekie
Process Variation Resilient Current-Domain Analog In Memory Computing. DATE (2023)
Tom Glint, Chandan Kumar Jha, Manu Awasthi, Joycee Mekie
Analysis of Quantization Across DNN Accelerator Architecture Paradigms. DATE (2023)
Kailash Prasad, Ayush Srivastava, Nistha Baruah, Joycee Mekie
Fast and Robust Sense Amplifier for Digital In Memory Computing. VLSID (2023)
Sai Shubham, Shubham Pandit, Kailash Prasad, Joycee Mekie
PVC-RAM:Process Variation Aware Charge Domain In-Memory Computing 6T-SRAM for DNNs. DAC (2023)
Tom Glint, Manu Awasthi, Joycee Mekie
REDRAW: Fast and Efficient Hardware Accelerator with Reduced Reads And Writes for 3D UNet. DATE (2023)
Tom Glint, Chandan Kumar Jha, Manu Awasthi, Joycee Mekie
A Fresh Perspective on DNN Accelerators by Performing Holistic Analysis Across Paradigms. CoRR (2022)
Neelam Surana, Pramod Kumar Bharti, Bachu Varun Tej, Joycee Mekie
Mixed-8T: Energy-Efficient Configurable Mixed-VT SRAM Design Techniques for Neural Networks. VLSID (2022)
Alok Parmar, Kailash Prasad, Nanditha Rao, Joycee Mekie
An Automated Approach to Compare Bit Serial and Bit Parallel In-Memory Computing for DNNs. ISCAS (2022)
Kailash Prasad, Jinay Dagli, Neel Shah, Mallikarjun Pidagannavar, Joycee Mekie
Impact of Operand Ordering in Approximate Multiplication in Neural Network and Image Processing Applications. VDAT (2022)
Diptesh Datta, Neelam Surana, Anoop Kumar, Joycee Mekie
Pseudo Precharge-Free Content Addressable Memory. IEEE Trans. Circuits Syst. II Express Briefs 69 (3) (2022)
Pramod Kumar Bharti, Joycee Mekie
RTQCC-14T: Radiation Tolerant Quadruple Cross Coupled Robust SRAM Design for Radiation Prone Environments. VDAT (2022)
Pramod Kumar Bharti, Saurabh Jain, Kamlesh R. Pillai, Sagar Varma Sayyaparaju, Gurpreet S. Kalsi, Joycee Mekie, Sreenivas Subramoney
Compute-In-Memory Using 6T SRAM for a Wide Variety of Workloads. ISCAS (2022)
Sumit Walia, Bachu Varun Tej, Arpita Kabra, Joydeep Kumar Devnath, Joycee Mekie
Fast and Low-Power Quantized Fixed Posit High-Accuracy DNN Implementation. IEEE Trans. Very Large Scale Integr. Syst. 30 (1) (2022)
Alok Parmar, Kailash Prasad, Nanditha Rao, Joycee Mekie
FastMem: A Fast Architecture-aware Memory Layout Design. ISQED (2022)
Pramod Kumar Bharti, Joycee Mekie
RHSCC-16T: Radiation Hardened Sextuple Cross Coupled Robust SRAM Design for Radiation Prone Environments. ICCD (2022)
Chandan Kumar Jha, Shreyas Singh, Riddhi Thakker, Manu Awasthi, Joycee Mekie
Zero Aware Configurable Data Encoding by Skipping Transfer for Error Resilient Applications. CoRR (2021)
Chandan Kumar Jha, Ishita Doshi, Joycee Mekie
Analysis of Worst-Case Data Dependent Temporal Approximation in Floating Point Units. IEEE Trans. Circuits Syst. II Express Briefs 68 (2) (2021)
Sarabjeet Singh, Neelam Surana, Pranjali Jain, Joycee Mekie, Manu Awasthi
HyGain: High Performance, Energy-Efficient Hybrid Gain Cell based Cache Hierarchy. CoRR (2021)
Varun Gohil, Sumit Walia, Joycee Mekie, Manu Awasthi
Fixed-Posit: A Floating-Point Representation for Error-Resilient Applications. CoRR (2021)
Praveen Venkatesh, Viraj Shah, Vrutik Shah, Yash Kamble, Joycee Mekie
Learning by Cheating : An End-to-End Zero Shot Framework for Autonomous Drone Navigation. CoRR (2021)
Kailash Prasad, Aditya Biswas, Joycee Mekie
Analysis of Word Line Shaping Techniques for In-Memory Computing in SRAMs. ICECS (2021)
Chandan Kumar Jha, Sumit Walia, Gagan Kanojia, Joycee Mekie
FPCAM: Floating Point Configurable Approximate Multiplier for Error Resilient Applications. ISCAS (2021)
Varun Gohil, Sumit Walia, Joycee Mekie, Manu Awasthi
Fixed-Posit: A Floating-Point Representation for Error-Resilient Applications. IEEE Trans. Circuits Syst. II Express Briefs 68 (10) (2021)
Chandan Kumar Jha, Shreyas Singh, Riddhi Thakker, Manu Awasthi, Joycee Mekie
Zero Aware Configurable Data Encoding by Skipping Transfer for Error Resilient Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (8) (2021)
Chandan Kumar Jha, Kailash Prasad, Arun Singh Tomar, Joycee Mekie
SEDAAF: FPGA Based Single Exact Dual Approximate Adders for Approximate Processors. ISCAS (2020)
Joydeep Kumar Devnath, Neelam Surana, Joycee Mekie
A Mathematical Approach Towards Quantization of Floating Point Weights in Low Power Neural Networks. VLSI Design (2020)
Neelam Surana, Mili Lavania, Abhishek Barma, Joycee Mekie
Robust and High-Performance 12-T Interlocked SRAM for In-Memory Computing. DATE (2020)
Chandan Kumar Jha, Sneha N. Ved, Ishant Anand, Joycee Mekie
Energy and Error Analysis Framework for Approximate Computing in Mobile Applications. IEEE Trans. Circuits Syst. II Express Briefs (2) (2020)
Sai Aparna Aketi, Smriti Gupta, Huimei Cheng, Joycee Mekie, Peter A. Beerel
SERAD: Soft Error Resilient Asynchronous Design Using a Bundled Data Protocol. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. (5) (2020)
Chandan Kumar Jha, Kailash Prasad, Vibhor Kumar Srivastava, Joycee Mekie
FPAD: A Multistage Approximation Methodology for Designing Floating Point Approximate Dividers. ISCAS (2020)
Tom Glint, Jitesh Sah, Manu Awasthi, Joycee Mekie
ANSim: A Fast and Versatile Asynchronous Network-On-Chip Simulator. ICCD (2020)
Sai Aparna Aketi, Smriti Gupta, Huimei Cheng, Joycee Mekie, Peter A. Beerel
SERAD: Soft Error Resilient Asynchronous Design using a Bundled Data Protocol. CoRR (2020)
Joydeep Kumar Devnath, Neelam Surana, Joycee Mekie
A Low-Voltage Split Memory Architecture for Binary Neural Networks. ISCAS (2020)
Ankita Nandi, Chandan Kumar Jha, Joycee Mekie
Tunable Inexact Subtracters for Division in Image Processing Applications. MWSCAS (2020)
Ankita Nandi, Chandan Kumar Jha, Joycee Mekie
Should We Code Differently When Using Approximate Circuits? APCCAS (2019)
Chandan Kumar Jha, Ankita Nandi, Joycee Mekie
Quality Tunable Approximate Adder for Low Energy Image Processing Applications. ICECS (2019)
Chandan Kumar Jha, Joycee Mekie
Design of Novel CMOS Based Inexact Subtractors and Dividers for Approximate Computing: An In-Depth Comparison with PTL Based Designs. DSD (2019)
Chandan Kumar Jha, Joycee Mekie
SEDA - Single Exact Dual Approximate Adders for Approximate Processors. DAC (2019)
Pramod Kumar Bharti, Neelam Surana, Joycee Mekie
Hetro8T: power and area efficient approximate heterogeneous 8T SRAM for H.264 video decoder. IET Comput. Digit. Tech. 13 (6) (2019)
Shubhanshu Gupta, Joycee Mekie
Soft Error Resilient and Energy Efficient Dual Modular TSPC Flip-Flop. VLSI Design (2019)
Pramod Kumar Bharti, Neelam Surana, Joycee Mekie
Power and Area Efficient Approximate Heterogeneous 8T SRAM for Multimedia Applications. VLSI Design (2019)
Sneha N. Ved, Sarabjeet Singh, Joycee Mekie
PANE: Pluggable Asynchronous Network-on-Chip Simulator. ACM J. Emerg. Technol. Comput. Syst. 15 (1) (2019)
Neelam Surana, Joycee Mekie
Energy Efficient Single-Ended 6-T SRAM for Multimedia Applications. IEEE Trans. Circuits Syst. II Express Briefs (6) (2019)
Sai Aparna Aketi, Joycee Mekie, Hemal Shah
Single-Error Hardened and Multiple-Error Tolerant Guarded Dual Modular Redundancy Technique. VLSI Design (2018)
Joycee Mekie, Prashansa Mukim, Kimaya Kale
Impact of Variations on Synchronizer Performance: An Experimental Study. VLSI Design (2018)
Subrahmanya Teja, Joycee Mekie, John-John Cabibihan, Nitish V. Thakor, Sunil L. Kukreja
Fault tolerant tactile sensor arrays for prosthesis. BioRob (2016)
Joycee Mekie, Sneha N. Ved
Tutorial T7B: Network on Chips - The Journey Overview. VLSI Design (2014)
Joycee Mekie
Effect of Dynamic Frequency Scaling on Interface Design for Rationally-Related Multi-clocked Systems. ASYNC (2014)
Supratik Chakraborty, Joycee Mekie, Dinesh K. Sharma
Reasoning about synchronization in GALS systems. Formal Methods Syst. Des. 28 (2) (2006)
Joycee Mekie, Supratik Chakraborty, Dinesh K. Sharma, Girish Venkataramani, P. S. Thiagarajan
Interface Design for Rationally Clocked GALS Systems. ASYNC (2006)
Joycee Mekie, Supratik Chakraborty, Dinesh K. Sharma
Evaluation of pausible clocking for interfacing high speed IP cores in GALS Framework. VLSI Design (2004)