Joseph L. Ganley

Publication Activity (10 Years)

Years Active: 1994-2001
Publications (10 Years): 0

Publications

Joseph L. Ganley, Lenwood S. Heath
The pagenumber of k-trees is O(k). Discret. Appl. Math. 109 (3) (2001)
Ion I. Mandoiu, Vijay V. Vazirani, Joseph L. Ganley
A new heuristic for rectilinear Steiner trees. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19 (10) (2000)
Joseph L. Ganley
Computing Optimal Rectilinear Steiner Trees: A Survey and Experimental Evaluation. Discret. Appl. Math. 90 (1-3) (1999)
Joseph L. Ganley, James P. Cohoon
Provably good moat routing. Integr. 27 (1) (1999)
Joseph L. Ganley
Efficient solution of systems of orientation constraints. ISPD (1999)
Ion I. Mandoiu, Vijay V. Vazirani, Joseph L. Ganley
A new heuristic for rectilinear Steiner trees. ICCAD (1999)
Tamra Carpenter, Steven Cosares, Joseph L. Ganley, Iraj Saniee
A Simple Approximation Algorithm for Two Problems in Circuit Design. IEEE Trans. Computers 47 (11) (1998)
Michael J. Alexander, James P. Cohoon, Joseph L. Ganley, Gabriel Robins
Placement and Routing for Performance-Oriented FPGA Layout. VLSI Design 1998 (1) (1998)
Joseph L. Ganley, Jeffrey S. Salowe
The Power-p Steiner Tree Problem. Nord. J. Comput. 5 (2) (1998)
Joseph L. Ganley, Lenwood S. Heath
An Experimental Evaluation of Local Search Heuristics for Graph Partitioning. Computing 60 (2) (1998)
Joseph L. Ganley, James P. Cohoon
Improved Computation of Optimal Rectilinear Steiner Minimal Trees. Int. J. Comput. Geom. Appl. 7 (5) (1997)
Joseph L. Ganley
Accuracy and fidelity of fast net length estimates. Integr. 23 (2) (1997)
Joseph L. Ganley, James P. Cohoon
Minimum-Congestion Hypergraph Embedding in a Cycle. IEEE Trans. Computers 46 (5) (1997)
Joseph L. Ganley, James P. Cohoon
A Provably Good Moat Routing Algorithm. Great Lakes Symposium on VLSI (1996)
Joseph L. Ganley, James P. Cohoon
Rectilinear Steiner trees on a checkerboard. ACM Trans. Design Autom. Electr. Syst. 1 (4) (1996)
Joseph L. Ganley, Jeffrey S. Salowe
Optimal and approximate bottleneck Steiner trees. Oper. Res. Lett. 19 (5) (1996)
Michael J. Alexander, James P. Cohoon, Joseph L. Ganley, Gabriel Robins
Performance-oriented placement and routing for field-programmable gate arrays. EURO-DAC (1995)
Joseph L. Ganley, James P. Cohoon
Thumbnail rectilinear Steiner trees. Great Lakes Symposium on VLSI (1995)
Joseph L. Ganley, Mordecai J. Golin, Jeffrey S. Salowe
The Multi-Weighted Spanning Tree Problem (Extended Abstract). COCOON (1995)
Joseph L. Ganley, James P. Cohoon
A faster dynamic programming algorithm for exact rectilinear Steiner minimal trees. Great Lakes Symposium on VLSI (1994)
Joseph L. Ganley, James P. Cohoon
Routing a Multi-Terminal Critical Net: Steiner Tree Construction in the Presence of Obstacles. ISCAS (1994)
Joseph L. Ganley, Lenwood S. Heath
Optimal and Random Partitions of Random Graphs. Comput. J. 37 (7) (1994)
Joseph L. Ganley, James P. Cohoon
) Time. CCCG (1994)
Joseph L. Ganley, Lenwood S. Heath
Heuristics for laying out information graphs. Computing 52 (4) (1994)
Michael J. Alexander, James P. Cohoon, Joseph L. Ganley, Gabriel Robins
An architecture-independent approach to FPGA routing based on multi-weighted graphs. EURO-DAC (1994)