John P. Knight

Publication Activity (10 Years)

Years Active: 1985-2005
Publications (10 Years): 0

Publications

Fred Ma, John P. Knight, Calvin Plett
Physical resource binding for a coarse-grain reconfigurable array using evolutionary algorithms. IEEE Trans. Very Large Scale Integr. Syst. 13 (5) (2005)
Fred Ma, John P. Knight, Calvin Plett
Physical Resource Binding for a Coarse Grain Reconfigurable Array. ERSA (2004)
Rolando Ramírez Ortiz, John P. Knight
Compatible cell connections for multifamily dynamic logic gates. IEEE Trans. Very Large Scale Integr. Syst. 10 (3) (2002)
Elie Torbey, John P. Knight
Multiclock selection and synthesis for CDFGs using optimal clock sets and genetic algorithms. IEEE Trans. Very Large Scale Integr. Syst. 9 (5) (2001)
Raul San Martin, John P. Knight
Optimizing Power in ASIC Behavioral Synthesis. IEEE Des. Test Comput. 13 (2) (1996)
Raul San Martin, John P. Knight
Power-Profiler: Optimizing ASICs Power Consumption at the Behavioral Level. DAC (1995)
Raul San Martin, John P. Knight
Operations research in the high-level synthesis of integrated circuits. Comput. Oper. Res. 20 (8) (1993)
Raul San Martin, John P. Knight
Genetic Algorithms for the Optimization of Integrated Circuits Synthesis. ICGA (1993)
Pierre G. Paulin, John P. Knight
Scheduling and Binding Algorithms for High-Level Synthesis. DAC (1989)
Pierre G. Paulin, John P. Knight
Algorithms for high-level synthesis. IEEE Des. Test 6 (6) (1989)
Pierre G. Paulin, John P. Knight
Force-directed scheduling for the behavioral synthesis of ASICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8 (6) (1989)
Pierre G. Paulin, John P. Knight
Force-Directed Scheduling in Automatic Data Path Synthesis. DAC (1987)
Pierre G. Paulin, John P. Knight, Emil F. Girczyc
HAL: a multi-paradigm approach to automatic data path synthesis. DAC (1986)
Emil F. Girczyc, Raymond J. A. Buhr, John P. Knight
Applicability of a Subset of Ada as an Algorithmic Hardware Description Language for Graph-Based Hardware Compilation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 4 (2) (1985)