Joe G. Xi

Publication Activity (10 Years)

Years Active: 1993-1997
Publications (10 Years): 0

Publications

Joe G. Xi, Wayne Wei-Ming Dai
Useful-Skew Clock Routing with Gate Sizing for Low Power Design. J. VLSI Signal Process. 16 (2-3) (1997)
Joe G. Xi, Wayne Wei-Ming Dai
Jitter-tolerant clock routing in two-phase synchronous systems. ICCAD (1996)
Joe G. Xi, Wayne Wei-Ming Dai
Useful-Skew Clock Routing With Gate Sizing for Low Power Design. DAC (1996)
Joe G. Xi, Wayne Wei-Ming Dai
Buffer Insertion and Sizing Under Process Variations for Low Power Clock Distribution. DAC (1995)
Qing Zhu, Wayne Wei-Ming Dai, Joe G. Xi
Optimal sizing of high-speed clock networks based on distributed RC and lossy transmission line models. ICCAD (1993)