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Jih-Sheng Shen
Publication Activity (10 Years)
Years Active: 2005-2014
Publications (10 Years): 0
Top Topics
Fast Fourier Transform
Spatio Temporally
Power Consumption
Floating Point
Top Venues
HPCS
Int. J. Embed. Syst.
Comput. Electr. Eng.
FPT
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Publications
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Hung-Lin Chao
,
Cheng-Chien Wu
,
Chun-Yang Peng
,
Chun-Hsien Lu
,
Jih-Sheng Shen
,
Pao-Ann Hsiung
Dynamic partially reconfigurable architecture for fast Fourier transform computation.
Int. J. Embed. Syst.
6 (2/3) (2014)
Jih-Sheng Shen
,
Pao-Ann Hsiung
Reasoning and Learning-Based Dynamic Codec Reconfiguration for Varying Processing Requirements in Network-on-Chip.
IEEE Trans. Very Large Scale Integr. Syst.
22 (8) (2014)
Jih-Sheng Shen
,
Pao-Ann Hsiung
,
Juin-Ming Lu
Reconfigurable Network-on-chip design for heterogeneous multi-core system architecture.
HPCS
(2014)
Hung-Lin Chao
,
Chun-Yang Peng
,
Cheng-Chien Wu
,
Ken-Shin Huang
,
Chun-Hsien Lu
,
Jih-Sheng Shen
,
Pao-Ann Hsiung
Spatio-Temporally-Shared Reconfigurable Fast Fourier Transform architecture design.
FPT
(2013)
Jih-Sheng Shen
,
Pao-Ann Hsiung
,
Chun-Hsian Huang
Learning-based adaptation to applications and environments in a reconfigurable network-on-chip for reducing crosstalk and dynamic power consumption.
Comput. Electr. Eng.
39 (2) (2013)
Wan-Ting Su
,
Jih-Sheng Shen
,
Pao-Ann Hsiung
Network-on-Chip router design with Buffer-Stealing.
ASP-DAC
(2011)
Pao-Ann Hsiung
,
Chun-Hsian Huang
,
Jih-Sheng Shen
,
Cheng-Chi Chiang
Scheduling and Placement of Hardware/Software Real-Time Relocatable Tasks in Dynamically Partially Reconfigurable Systems.
ACM Trans. Reconfigurable Technol. Syst.
4 (1) (2010)
Chun-Hsian Huang
,
Pao-Ann Hsiung
,
Jih-Sheng Shen
UML-based hardware/software co-design platform for dynamically partially reconfigurable network security systems.
J. Syst. Archit.
56 (2-3) (2010)
Jih-Sheng Shen
,
Chun-Hsian Huang
,
Pao-Ann Hsiung
Learning-based adaptation to applications and environments in a reconfigurable Network-on-Chip.
DATE
(2010)
Chun-Hsian Huang
,
Pao-Ann Hsiung
,
Jih-Sheng Shen
Model-based platform-specific co-design methodology for dynamically partially reconfigurable systems with hardware virtualization and preemption.
J. Syst. Archit.
56 (11) (2010)
Chun-Hsian Huang
,
Jih-Sheng Shen
,
Pao-Ann Hsiung
A Self-Adaptive Hardware/Software System Architecture for Ubiquitous Computing Applications.
UIC
(2010)
Jih-Sheng Shen
,
Pao-Ann Hsiung
,
Kuei-Chung Chang
A novel spatio-temporal adaptive bus encoding for reducing crosstalk interferences with trade-offs between performance and reliability.
ACSAC
(2008)
Kuei-Chung Chang
,
Jih-Sheng Shen
,
Tien-Fu Chen
Tailoring circuit-switched network-on-chip to application-specific system-on-chip by two optimization schemes.
ACM Trans. Design Autom. Electr. Syst.
13 (1) (2008)
Jih-Sheng Shen
,
Kuei-Chung Chang
,
Tien-Fu Chen
On a design of crossroad switches for low-power on-chip communication architectures.
ISCAS
(2006)
Kuei-Chung Chang
,
Jih-Sheng Shen
,
Tien-Fu Chen
Evaluation and design trade-offs between circuit-switched and packet-switched NOCs for application-specific SOCs.
DAC
(2006)
Kuei-Chung Chang
,
Jih-Sheng Shen
,
Tien-Fu Chen
Fast Run-Time Power Monitoring Methodology for Embedded Systems.
ESA
(2006)
Kuei-Chung Chang
,
Jih-Sheng Shen
,
Tien-Fu Chen
Crossroad System-on-Chip Communication Architecture for Low Power Embedded Systems.
ESA
(2005)
Kuei-Chung Chang
,
Jih-Sheng Shen
,
Tien-Fu Chen
A low-power crossroad switch architecture and its core placement for network-on-chip.
ISLPED
(2005)