A low-power crossroad switch architecture and its core placement for network-on-chip.

Kuei-Chung Chang Jih-Sheng Shen Tien-Fu Chen

Published in: ISLPED (2005)

Keyphrases

low power
network on chip
power dissipation
high speed
cmos technology
power consumption
vlsi architecture
low cost
single chip
nm technology
multi processor
logic circuits
mixed signal
digital signal processing
routing algorithm
image sensor
real time
single processor
power supply
network simulator
fault tolerant