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Jiangchao Wu
Publication Activity (10 Years)
Years Active: 2013-2024
Publications (10 Years): 9
Top Topics
Image Sensor
Wyner Ziv
Metal Oxide Semiconductor
Fully Integrated
Top Venues
IEEE Trans. Circuits Syst. II Express Briefs
A-SSCC
APCCAS
CICC
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Publications
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Jiangchao Wu
,
Ke Hu
,
Xuanlin Chen
,
Pui-In Mak
,
Rui Paulo Martins
,
Man Kay Law
A 0.25pJ/Comparison, 27.3μV Input Noise Dynamic Comparator Exploiting Stacked Floating Preamplifier with Cross-Coupled Feedback Inverters in 180nm CMOS.
CICC
(2024)
Xin Lu
,
Jiangchao Wu
,
Zhao Wang
,
Yifei Xiang
,
Liyuan Liu
,
Pui-In Mak
,
Rui Paulo Martins
,
Man-Kay Law
A 0.013 mm² 3.2-ns Input Range 10-Bit Cyclic Time-to-Digital Converter Using Gated Ring Oscillator With Phase Domain Reset in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs
71 (8) (2024)
Feiyu Li
,
Qishen Fang
,
Jiangchao Wu
,
Yang Jiang
,
Pui-In Mak
,
Rui Paulo Martins
,
Man-Kay Law
-Free Multi-Phase Switched-Capacitor DC-DC Converter Achieving a Fast DVS up to 222.5 mV/ns.
IEEE J. Solid State Circuits
59 (6) (2024)
Jiangchao Wu
,
Guangshu Zhao
,
Litao Zhang
,
Yu Jia
,
Yang Jiang
,
Pui-In Mak
,
Rui Paulo Martins
,
Man Kay Law
.
A-SSCC
(2023)
Yu Lei
,
Qishen Fang
,
Jiangchao Wu
,
Man-Kay Law
,
Pui-In Mak
,
Rui Paulo Martins
High Linearity BJT-Based Time-Domain CMOS Temperature Sensor.
APCCAS
(2022)
Jiangchao Wu
,
Hou-Man Leong
,
Yang Jiang
,
Man-Kay Law
,
Pui-In Mak
,
Rui Paulo Martins
A Fully Integrated 10-V Pulse Driver Using Multiband Pulse-Frequency Modulation in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst.
29 (9) (2021)
Chuanqi Wei
,
Jiangchao Wu
,
Man-Kay Law
,
Pui-In Mak
,
Rui Paulo Martins
Low Complexity Illumination-Invariant Motion Vector Detection Based on Logarithmic Edge Detection and Edge Difference.
ISCAS
(2020)
Jiangchao Wu
,
Ka-Chon Lei
,
Hou-Man Leong
,
Yang Jiang
,
Man-Kay Law
,
Pui-In Mak
,
Rui Paulo Martins
Fully Integrated High Voltage Pulse Driver Using Switched-Capacitor Voltage Multiplier and Synchronous Charge Compensation in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs
(10) (2019)
Jiangchao Wu
,
Man-Kay Law
,
Pui-In Mak
,
Rui Paulo Martins
A 2-µW 45-nV/√Hz Readout Front End With Multiple-Chopping Active-High-Pass Ripple Reduction Loop and Pseudofeedback DC Servo Loop.
IEEE Trans. Circuits Syst. II Express Briefs
(4) (2016)
Jiangchao Wu
,
Man-Kay Law
,
Pui-In Mak
,
Rui Paulo Martins
A 1.83 μW, 0.78 μVrms input referred noise neural recording front end.
ISCAS
(2013)