A 0.013 mm² 3.2-ns Input Range 10-Bit Cyclic Time-to-Digital Converter Using Gated Ring Oscillator With Phase Domain Reset in 65-nm CMOS.
Xin LuJiangchao WuZhao WangYifei XiangLiyuan LiuPui-In MakRui Paulo MartinsMan-Kay LawPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2024)
Keyphrases