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Jiale Yan
ORCID
Publication Activity (10 Years)
Years Active: 2018-2024
Publications (10 Years): 8
Top Topics
Sparse Matrix
Neural Network Model
Tensor Factorization
Reconfigurable Architecture
Top Venues
LoG
CoRR
J. Comput. Phys.
Comput. Secur.
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Publications
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Yuta Nagahara
,
Jiale Yan
,
Kazushi Kawamura
,
Masato Motomura
,
Thiem Van Chu
Efficient COO to CSR Conversion for Accelerating Sparse Matrix Processing on FPGA.
ICCE
(2024)
Xinlong He
,
Yang Xu
,
Sicong Zhang
,
Weida Xu
,
Jiale Yan
Enhance membership inference attacks in federated learning.
Comput. Secur.
136 (2024)
Yuta Nagahara
,
Jiale Yan
,
Kazushi Kawamura
,
Masato Motomura
,
Thiem Van Chu
Sparse-Sparse Matrix Multiplication Accelerator on FPGA featuring Distribute-Merge Product Dataflow.
ASPDAC
(2024)
Jiale Yan
,
Hiroaki Ito
,
Ángel López García-Arias
,
Yasuyuki Okoshi
,
Hikari Otsuka
,
Kazushi Kawamura
,
Thiem Van Chu
,
Masato Motomura
Multicoated and Folded Graph Neural Networks With Strong Lottery Tickets.
LoG
(2023)
Jiale Yan
,
Hiroaki Ito
,
Ángel López García-Arias
,
Yasuyuki Okoshi
,
Hikari Otsuka
,
Kazushi Kawamura
,
Thiem Van Chu
,
Masato Motomura
Multicoated and Folded Graph Neural Networks with Strong Lottery Tickets.
CoRR
(2023)
Jiale Yan
,
Kota Ando
,
Jaehoon Yu
,
Masato Motomura
TT-MLP: Tensor Train Decomposition on Deep MLPs.
IEEE Access
11 (2023)
Jiale Yan
,
Shaofan Li
,
A-Man Zhang
,
Xingyu Kan
,
Peng-Nan Sun
Updated Lagrangian Particle Hydrodynamics (ULPH) modeling and simulation of multiphase flows.
J. Comput. Phys.
393 (2019)
Jiale Yan
,
Shouyi Yin
,
Fengbin Tu
,
Leibo Liu
,
Shaojun Wei
GNA: Reconfigurable and Efficient Architecture for Generative Network Acceleration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
37 (11) (2018)