Jaroslav Skarvada

Publication Activity (10 Years)

Years Active: 2006-2010
Publications (10 Years): 0

Publications

Jaroslav Skarvada, Zdenek Kotásek, Josef Strnadel
The Use of Genetic Algorithm to Reduce Power Consumption during Test Application. ICES (2010)
Zdenek Kotásek, Jaroslav Skarvada, Josef Strnadel
Reduction of power dissipation through parallel optimization of test vector and scan register sequences. DDECS (2010)
Zdenek Kotásek, Jaroslav Skarvada, Josef Strnadel
The Use of Genetic Algorithm to Derive Correlation Between Test Vector and Scan Register Sequences and Reduce Power Consumption. DSD (2010)
Jaroslav Skarvada, Zdenek Kotásek, Tomas Herrman
Power Conscious RTL Test Scheduling. DSD (2008)
Michal Bidlo, Jaroslav Skarvada
Instruction-based development: From evolution to generic structures of digital circuits. Int. J. Knowl. Based Intell. Eng. Syst. 12 (3) (2008)
Jaroslav Skarvada, Zdenek Kotásek, Tomas Herrman
Testability analysis based on the identification of testable blocks with predefined properties. Microprocess. Microsystems 32 (5-6) (2008)
Jaroslav Skarvada, Tomas Herrman, Zdenek Kotásek
Testability Analysis Based on the Identification of Testable Blocks with Predefined Properties. DSD (2007)
Jaroslav Skarvada
Test Scheduling for SoC under Power Constraints. DDECS (2006)