​
Login / Signup
Ja-Yol Lee
ORCID
Publication Activity (10 Years)
Years Active: 2006-2022
Publications (10 Years): 1
Top Topics
Additive Noise
Hurst Exponent
Noise Model
Digital Curves
Top Venues
VLSIC
MWSCAS
IEEE Access
</>
Publications
</>
Minuk Heo
,
Sunghyun Bae
,
Ja-Yol Lee
,
Cheonsu Kim
,
Minjae Lee
A 3-3.7GHz Time-Difference Controlled Digital Fractional-N PLL With a High-Gain Time Amplifier for IoT Applications.
IEEE Access
10 (2022)
Wooyeol Choi
,
Zeshan Ahmad
,
Amit Jha
,
Ja-Yol Lee
,
Insoo Kim
,
Kenneth K. O
at 1-kHz noise bandwidth.
VLSIC
(2015)
Ja-Yol Lee
,
Mi-Jeong Park
,
Hyun-Kyu Yu
,
Cheon-Soo Kim
A 230ns settling time type-I PLL with 0.96mW TDC power and simple TV calculation algorithm.
MWSCAS
(2014)
Ja-Yol Lee
,
Mi-Jeong Park
,
Byung-Hun Min
,
Seongdo Kim
,
Mun-Yang Park
,
Hyun-Kyu Yu
A 4-GHz All Digital PLL With Low-Power TDC and Phase-Error Compensation.
IEEE Trans. Circuits Syst. I Regul. Pap.
(8) (2012)
Ja-Yol Lee
,
Mi-Jeong Park
,
Byonghoon Mhin
,
Seongdo Kim
,
Moon-Yang Park
,
Hyunku Yu
A 4-GHz all digital fractional-N PLL with low-power TDC and big phase-error compensation.
CICC
(2011)
Ja-Yol Lee
,
Kwi-Dong Kim
,
Jong-Kee Kwon
,
Seung-Chul Lee
,
Jongdae Kim
,
Sang-Heung Lee
A 3.8-5.5-GHz Multi-Band CMOS Frequency Synthesizer for WPAN/WLAN Applications.
CICC
(2006)