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I-Lun Tseng
ORCID
Publication Activity (10 Years)
Years Active: 2004-2024
Publications (10 Years): 11
Top Topics
Semi Automated
Modular Design
Reinforcement Learning
Pattern Matching
Top Venues
CoRR
APCCAS
ISPD
DAC
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Publications
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I-Lun Tseng
Challenges in Floorplanning and Macro Placement for Modern SoCs.
ISPD
(2024)
Fu-Chieh Chang
,
Yu-Wei Tseng
,
Ya-Wen Yu
,
Ssu-Rui Lee
,
Alexandru Cioba
,
I-Lun Tseng
,
Da-Shan Shiu
,
Jhih-Wei Hsu
,
Cheng-Yuan Wang
,
Chien-Yi Yang
,
Ren-Chu Wang
,
Yao-Wen Chang
,
Tai-Chen Chen
,
Tung-Chieh Chen
Flexible Multiple-Objective Reinforcement Learning for Chip Placement.
CoRR
(2022)
Fu-Chieh Chang
,
Yu-Wei Tseng
,
Ya-Wen Yu
,
Ssu-Rui Lee
,
Alexandru Cioba
,
I-Lun Tseng
,
Da-Shan Shiu
,
Jhih-Wei Hsu
,
Cheng-Yuan Wang
,
Chien-Yi Yang
,
Ren-Chu Wang
,
Yao-Wen Chang
,
Tai-Chen Chen
,
Tung-Chieh Chen
Flexible chip placement via reinforcement learning: late breaking results.
DAC
(2022)
I-Lun Tseng
,
Zhao Chuan Lee
,
Vikas Tripathi
,
Chun Ming Tommy Yip
,
Zhinan Chen
,
Jonathan Ong
A System for Standard Cell Routability Checking and Placement Routability Improvements.
APCCAS
(2019)
I-Lun Tseng
,
Yongfu Li
,
Valerio Perez
,
Vikas Tripathi
,
Zhao Chuan Lee
,
Yoong Seang Jonathan Ong
An Automated System for Checking Lithography Friendliness of Standard Cells.
CoRR
(2018)
Yongfu Li
,
Valerio Perez
,
I-Lun Tseng
,
Zhao Chuan Lee
,
Vikas Tripathi
,
Jason Khaw
,
Yoong Seang Jonathan Ong
Advanced In-Design Auto-Fixing Flow for Cell Abutment Pattern Matching Weakpoints.
CoRR
(2018)
I-Lun Tseng
,
Yongfu Li
,
Valerio Perez
,
Vikas Tripathi
,
Zhao Chuan Lee
,
Yoong Seang Jonathan Ong
An Automated System for Checking Lithography Friendliness of Standard Cells.
APCCAS
(2018)
Yongfu Li
,
I-Lun Tseng
,
Zhao Chuan Lee
,
Valerio Perez
,
Vikas Tripathi
,
Yoong Seang Jonathan Ong
Identifying Lithography Weak-Points of Standard Cells with Partial Pattern Matching.
ISVLSI
(2018)
Vikas Tripathi
,
Yongfu Li
,
Zhao Chuan Lee
,
I-Lun Tseng
,
Jason Khaw
,
Jonathan Ong
In Design DFM Rule Scoring and Fixing Method using ICV.
CoRR
(2018)
Vikas Tripathi
,
Valerio Perez
,
Yongfu Li
,
Zhao Chuan Lee
,
I-Lun Tseng
,
Jonathan Ong
Context-Aware DFM Rule Analysis and Scoring Using Machine Learning.
CoRR
(2018)
I-Lun Tseng
,
Valerio Perez
,
Yongfu Li
,
Zhao Chuan Lee
,
Vikas Tripathi
,
Yoong Seang Jonathan Ong
Creation and Fixing of Lithography Hotspots with Synopsys Tools.
CoRR
(2018)
Yao-I Tseng
,
I-Lun Tseng
,
Tsao Hsiao Huang
,
Adam Postula
Fast partitioning of parameterized 45-degree polygons into parameterized trapezoids.
NEWCAS
(2013)
Hsin-Hung Liu
,
Rung-Bin Lin
,
I-Lun Tseng
Relocatable and resizable SRAM synthesis for via configurable structured ASIC.
ISQED
(2013)
Yao-Lin Chang
,
I-Lun Tseng
A parallel dual-scanline algorithm for partitioning parameterized 45-degree polygons.
ACM Trans. Design Autom. Electr. Syst.
18 (4) (2013)
Yao-I Tseng
,
I-Lun Tseng
,
Adam Postula
Boolean mask operations on parameterized 45-degree polygons.
MWSCAS
(2013)
I-Lun Tseng
,
Huan-Wen Chen
,
Che-I Lee
,
Adam Postula
Constraint-Based Dogleg Channel Routing with Via Minimization.
IC-AI
(2010)
I-Lun Tseng
,
Adam Postula
Partitioning parameterized 45-degree polygons with constraint programming.
ACM Trans. Design Autom. Electr. Syst.
13 (3) (2008)
I-Lun Tseng
,
Adam Postula
An efficient algorithm for partitioning parameterized polygons into rectangles.
ACM Great Lakes Symposium on VLSI
(2006)
I-Lun Tseng
,
Adam Postula
GBLD: A Formal Model for Layout Description and Generation.
FDL
(2004)