Hyojin Choi

Publication Activity (10 Years)

Years Active: 2007-2021
Publications (10 Years): 1

Top Topics

Cache Management

Power Reduction

Garbage Collection

Top Venues

Publications

Hyojin Choi, In Huh, Seungju Kim, Jeonghoon Ko, Changwook Jeong, Hyeonsik Son, Kiwon Kwon, Joonwan Chai, Younsik Park, Jaehoon Jeong, Daesin Kim, Jung Yun Choi
Application of Deep Reinforcement Learning to Dynamic Verification of DRAM Designs. DAC (2021)
Seokil Song, Taein Jeon, Eungjin Kim, Jinsu Kim, Dojin Choi, Yeona Kim, Hyojin Choi, Kyunbyoung Ko, Cheol Mun
Demo: Human-Interactive Hardware-In-the-Loop Simulator for Cooperative Intelligent Transportation Systems and services. VNC (2015)
Min Baek, Hwan Lee, Hyojin Choi, Kyunbyoung Ko
Poster: Development of ICA algorithm for V2X communications by using PreScan. VNC (2015)
Su-Jin Cho, Jae-Woo Ahn, Hyojin Choi, Wonyong Sung
Performance analysis of multi-bank DRAM with increased clock frequency. ISCAS (2012)
Hyojin Choi, Jae-Woo Ahn, Wonyong Sung
Reducing off-chip memory traffic by selective cache management scheme in GPGPUs. GPGPU@ASPLOS (2012)
Hyojin Choi, Kyuyeon Hwang, Jae-Woo Ahn, Wonyong Sung
A simulation-based study for DRAM power reduction strategies in GPGPUs. ISCAS (2012)
Hyojin Choi, Jongbok Lee, Wonyong Sung
Memory access pattern-aware DRAM performance model for multi-core systems. ISPASS (2011)
Hyojin Choi, Wei Liu, Wonyong Sung
VLSI Implementation of BCH Error Correction for Multilevel Cell NAND Flash Memory. IEEE Trans. Very Large Scale Integr. Syst. 18 (5) (2010)
Wonchul Lee, Hyojin Choi, Wonyong Sung
Algorithm and Software Optimization of Variable Block Size Motion Estimation for H.264/AVC on a VLIW-SIMD DSP. J. Signal Process. Syst. 51 (3) (2008)
Wonchul Lee, Hyojin Choi, Wonyong Sung
Fast Block Mode Decision for H.264/AVC on a Programmable Digital Signal Processor. SiPS (2007)
Hyojin Choi, Wonchul Lee, Wonyong Sung
Memory Access Reduced Software Implementation of H.264/AVC Sub-pixel Motion Estimation Using Differential Data Encoding. ISCAS (2007)