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Hyeon-June Kim
ORCID
Publication Activity (10 Years)
Years Active: 2014-2024
Publications (10 Years): 11
Top Topics
Response Time
Theoretical And Experimental Analysis
Cmos Image Sensor
Circuit Design
Top Venues
IEEE J. Solid State Circuits
Sensors
Integr.
IEEE Access
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Publications
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Hyeon-June Kim
,
Dong-Yeon Lee
,
Min-Jun Park
Development and validation of a 64-channel ROIC prototype for SWIR line scan sensor applications.
Integr.
98 (2024)
Hyeon-June Kim
Design of A prototype 128 × 128 ROIC array for 2.6 μm-wavelength SWIR image sensor applications.
Integr.
98 (2024)
Jun-Nyeong Kim
,
Hyeon-June Kim
A Chemoresistive Gas Sensor Readout Integrated Circuit With Sensor Offset Cancellation Technique.
IEEE Access
11 (2023)
Cheol Ho Kim
,
Hyeon-June Kim
Theoretical and Experimental Analysis of Reversed Uneven Power Splitting Technique in GaN MMIC Doherty Power Amplifiers.
IEEE Access
11 (2023)
Sunghyun Bae
,
Hyeon-June Kim
Two-Channel OTDM System for Data-Center Interconnects: A Review.
Sensors
23 (13) (2023)
Dong-Yeon Lee
,
Joon-Boo Yu
,
Hyung-Gi Byun
,
Hyeon-June Kim
Chemoresistive Sensor Readout Circuit Design for Detecting Gases with Slow Response Time Characteristics.
Sensors
22 (3) (2022)
Je-Hoon Lee
,
Hyeon-June Kim
Black-sun noise immune correlated double sampling scheme for CMOS image sensors.
IEICE Electron. Express
18 (10) (2021)
Hyeon-June Kim
11-bit Column-Parallel Single-Slope ADC With First-Step Half-Reference Ramping Scheme for High-Speed CMOS Image Sensors.
IEEE J. Solid State Circuits
56 (7) (2021)
Hyeon-June Kim
,
Eun-Gyu Lee
,
Choul-Young Kim
A High-Multi Target Resolution Focal Plane Array-Based Laser Detection and Ranging Sensor.
Sensors
19 (5) (2019)
Hyeon-June Kim
,
Sun-Il Hwang
,
Jae-Hyun Chung
,
Jong-Ho Park
,
Seung-Tak Ryu
A Dual-Imaging Speed-Enhanced CMOS Image Sensor for Real-Time Edge Image Extraction.
IEEE J. Solid State Circuits
52 (9) (2017)
Hyeon-June Kim
,
Sun-Il Hwang
,
Ji-Wook Kwon
,
Dong-Hwan Jin
,
Byoung Soo Choi
,
Sang-Gwon Lee
,
Jong-Ho Park
,
Jang-Kyoo Shin
,
Seung-Tak Ryu
A Delta-Readout Scheme for Low-Power CMOS Image Sensors With Multi-Column-Parallel SAR ADCs.
IEEE J. Solid State Circuits
51 (10) (2016)
Hyeon-June Kim
,
Sun-Il Hwang
,
Ji-Wook Kwon
,
Dong-Hwan Jin
,
Byoung Soo Choi
,
Sang-Gwon Lee
,
Jong-Ho Park
,
Jang-Kyoo Shin
,
Seung-Tak Ryu
Delta readout scheme for image-dependent power savings in a CMOS image sensor with multi-column-parallel SAR ADCs.
A-SSCC
(2015)
Dong-Hwan Jin
,
Ji-Wook Kwon
,
Hyeon-June Kim
,
Sun-Il Hwang
,
Min-Chul Shin
,
Junho Cheon
,
Seung-Tak Ryu
A 15 µm-Pitch, 8.7-ENOB, 13-Mcells/sec Logarithmic Readout Circuit for Multi-Level Cell Phase Change Memory.
IEEE J. Solid State Circuits
50 (10) (2015)
Ji-Wook Kwon
,
Dong-Hwan Jin
,
Hyeon-June Kim
,
Sun-Il Hwang
,
Min-Chul Shin
,
Jong-Ho Kang
,
Seung-Tak Ryu
A two-step 5b logarithmic ADC with minimum step-size of 0.1% full-scale for MLC phase-change memory readout.
CICC
(2014)