Hrvoje Mlinaric

Publication Activity (10 Years)

Years Active: 2006-2019
Publications (10 Years): 4

Top Topics

Immersive Environments

Video Processing

Learning Platform

Computer Engineering

Top Venues

Publications

Igor Piljic, Leon Dragic, Alen Duspara, Mate Cobrnic, Hrvoje Mlinaric, Mario Kovac
Bolt65 - performance-optimized HEVC HW/SW suite for Just-in-Time video processing. MIPRO (2019)
Mate Cobrnic, Alen Duspara, Leon Dragic, Igor Piljic, Hrvoje Mlinaric, Mario Kovac
An Area Efficient and Reusable HEVC 1D-DCT Hardware Accelerator. PPAM (1) (2019)
Jose Flich, Giovanni Agosta, Philipp Ampletzer, David Atienza Alonso, Carlo Brandolese, Etienne Cappe, Alessandro Cilardo, Leon Dragic, Alexandre Dray, Alen Duspara, William Fornaciari, Gerald Guillaume, Ynse Hoornenborg, Arman Iranfar, Mario Kovac, Simone Libutti, Bruno Maitre, José Maria Martínez, Giuseppe Massari, Hrvoje Mlinaric, Ermis Papastefanakis, Tomás Picornell, Igor Piljic, Anna Pupykina, Federico Reghenzani, Isabelle Staub, Rafael Tornero, Marina Zapater, Davide Zoni
MANGO: Exploring Manycore Architectures for Next-GeneratiOn HPC Systems. DSD (2017)
Jose Flich, Giovanni Agosta, Philipp Ampletzer, David Atienza Alonso, Carlo Brandolese, Alessandro Cilardo, William Fornaciari, Ynse Hoornenborg, Mario Kovac, Bruno Maitre, Giuseppe Massari, Hrvoje Mlinaric, Ermis Papastefanakis, Fabrice Roudet, Rafael Tornero, Davide Zoni
Enabling HPC for QoS-sensitive applications: The MANGO approach. DATE (2016)
Martin Zagar, Nikolina Frid, Josip Knezovic, Daniel Hofman, Mario Kovac, Vlado Sruk, Hrvoje Mlinaric
Work in progress: Embedded computer engineering learning platform capabilities. EDUCON (2015)
Martin Zagar, Nikolina Frid, Josip Knezovic, Daniel Hofman, Mario Kovac, Vlado Sruk, Hrvoje Mlinaric
Unified, multiple target, computer engineering learning platform. EDUCON (2014)
Nikolina Frid, Vlado Sruk, Hrvoje Mlinaric, Mario Kovac
Computer Engineering Laboratory Course: E2LP Platform Experience. E2LP@FedCSIS (2014)
Hrvoje Mlinaric, Mario Kovac, Josip Knezovic
Application of Dynamically Reconfigurable Processors in Digital Signal Processing. SIGMAP (2006)