Hidemasa Kubota

Publication Activity (10 Years)

Years Active: 2002-2007
Publications (10 Years): 0

Publications

Takayuki Watanabe, Yuichi Tanji, Hidemasa Kubota, Hideki Asai
Fast Transient Simulation of Power Distribution Networks Containing Dispersion Based on Parallel-Distributed Leapfrog Algorithm. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2007)
Hidemasa Kubota, Yuichi Tanji, Takayuki Watanabe, Hideki Asai
An Enhanced Time-Domain Circuit Simulation Technique Based on LIM. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (5) (2006)
Yuichi Tanji, Takayuki Watanabe, Hidemasa Kubota, Hideki Asai
Quasi-One-Step Gauss-Jacobi Method for Large-Scale Interconnect Analysis via RLCG-MNA Formulation. ISQED (2006)
Takayuki Watanabe, Yuichi Tanji, Hidemasa Kubota, Hideki Asai
Parallel-distributed time-domain circuit simulation of power distribution networks with frequency-dependent parameters. ASP-DAC (2006)
Yuichi Tanji, Takayuki Watanabe, Hidemasa Kubota, Hideki Asai
Large scale RLC circuit analysis using RLCG-MNA formulation. DATE (2006)
Takashi Mine, Hidemasa Kubota, Atsushi Kamo, Takayuki Watanabe, Hideki Asai
Modified hybrid reduction technique for the simulation of linear/nonlinear mixed circuits. ISCAS (5) (2005)
Hirofumi Suzuki, Hidemasa Kubota, Takayuki Watanabe, Hideki Asai
Interconnect simulation using FDTD method with variable mesh size technique. ECCTD (2005)
Hidemasa Kubota, Yuichi Tanji, Takayuki Watanabe, Hideki Asai
Generalized method of the time-domain circuit simulation based on LIM with MNA formulation. CICC (2005)
Yuichi Tanji, Hidemasa Kubota
Passive approximation of tabulated frequency-data by Fourier expansion method. ISCAS (6) (2005)
Takashi Mine, Hidemasa Kubota, Atsushi Kamo, Takayuki Watanabe, Hideki Asai
Hybrid Reduction Technique for Efficient Simulation of Linear/Nonlinear Mixed Circuits. DATE (2004)
Hidemasa Kubota, Atsushi Kamo, Takayuki Watanabe, Hideki Asai
Noise analysis of power/ground planes on PCB by SPICE-like simulator with model order reduction technique. ISCAS (5) (2002)
Hidemasa Kubota, Atsushi Kamo, Takayuki Watanabe, Hideki Asai
An Efficient Simulator for Multiport Interconnects with Model Order Reduction Technique. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (6) (2002)