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Henry Block
Publication Activity (10 Years)
Years Active: 2013-2017
Publications (10 Years): 3
Top Topics
Hardware Architecture
Tree Structure
Hardware Implementation
Maximum Parsimony
Top Venues
FPL
IEICE Trans. Inf. Syst.
FPT
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Publications
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Henry Block
,
Tsutomu Maruyama
FPGA Hardware Acceleration of a Phylogenetic Tree Reconstruction with Maximum Parsimony Algorithm.
IEICE Trans. Inf. Syst.
(2) (2017)
Henry Block
,
Tsutomu Maruyama
An FPGA hardware implementation approach for a phylogenetic tree reconstruction algorithm with incremental tree optimization.
FPL
(2017)
Henry Block
,
Tsutomu Maruyama
An FPGA implementation of a phylogenetic tree reconstruction algorithm using an alternative second-pass optimization.
FPL
(2015)
Henry Block
,
Tsutomu Maruyama
An FPGA hardware acceleration of the indirect calculation of tree lengths method for phylogenetic tree reconstruction.
FPL
(2014)
Henry Block
,
Tsutomu Maruyama
A hardware acceleration of a phylogenetic tree reconstruction with maximum parsimony algorithm using FPGA.
FPT
(2013)