Login / Signup
Hari Ananthan
Publication Activity (10 Years)
Years Active: 2004-2006
Publications (10 Years): 0
</>
Publications
</>
Hari Ananthan
,
Kaushik Roy
A fully physical model for leakage distribution under process variations in Nanoscale double-gate CMOS.
DAC
(2006)
Kaushik Roy
,
Hamid Mahmoodi-Meimand
,
Saibal Mukhopadhyay
,
Hari Ananthan
,
Aditya Bansal
,
Tamer Cakici
Double-Gate SOI Devices for Low-Power and High-Performance Applications.
VLSI Design
(2006)
Kaushik Roy
,
Hamid Mahmoodi-Meimand
,
Saibal Mukhopadhyay
,
Hari Ananthan
,
Aditya Bansal
,
Tamer Cakici
Double-gate SOI devices for low-power and high-performance applications.
ICCAD
(2005)
Hari Ananthan
,
Chris H. Kim
,
Kaushik Roy
Larger-than-vdd forward body bias in sub-0.5V nanoscale CMOS.
ISLPED
(2004)
Hari Ananthan
,
Aditya Bansal
,
Kaushik Roy
FinFET SRAM - Device and Circuit Design Considerations.
ISQED
(2004)