Gyung-Su Byun

Publication Activity (10 Years)

Years Active: 2014-2021
Publications (10 Years): 15

Top Topics

Comparative Analysis

Gigabit Ethernet

Vlsi Architecture

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Hanh Dangba, Thang Bui-ngoc, Hae-jin Kim, Jun-hee Song, Chaiyoon Chung, Gyung-Su Byun
A High-speed Wireless Data Transfer for Non - Destructive Testing. ISOCC (2021)
Ngoc Thang Bui, Gyung-Su Byun
The Comparison Features of ECG Signal with Different Sampling Frequencies and Filter Methods for Real-Time Measurement. Symmetry 13 (8) (2021)
Nahid Mirzaie, Ahmed Alzahmi, Chung-Ching Lin, Gyung-Su Byun
A 3D flash ADC structure for high-speed communication applications. CCWC (2018)
Chung-Ching Lin, Ahmed Alzahmi, Nahid Mirzaie, Gyung-Su Byun
Design of a Pre-Distortion Power Amplifier for Ku-Band/5G Applications. EIT (2018)
Nahid Mirzaie, Ahmed Alzahmi, Hossein Shamsi, Gyung-Su Byun
Three-Dimensional Pipeline ADC Utilizing TSV/ Design Optimization and Memristor Ratioed Logic. IEEE Trans. Very Large Scale Integr. Syst. 26 (12) (2018)
Majid Jalalifar, Gyung-Su Byun
A Wide-Range Low-Power PLL-Based PI Multiphase Generator Using an Adaptive Frequency Tracking Technique. IEEE Trans. Circuits Syst. II Express Briefs (7) (2018)
Nahid Mirzaie, Hossein Shamsi, Gyung-Su Byun
Yield-aware sizing of pipeline ADC using a multiple-objective evolutionary algorithm. Int. J. Circuit Theory Appl. 45 (6) (2017)
Ahmed Alzahmi, Nahid Mirzaie, Chung-Ching Lin, Gyung-Su Byun
Low-power and high-performance 2.4 GHz RF transmitter for biomedical application. UEMCON (2017)
Ahmed Alzahmi, Nahid Mirzaie, Chung-Ching Lin, Insoo Kim, Gyung-Su Byun
High-performance RF-interconnect for 3D stacked memory. ISOCC (2017)
Nahid Mirzaie, Ahmed Alzahmi, Chung-Ching Lin, Gyung-Su Byun
A performance-aware I/O interface for 3D stacked memory systems. UEMCON (2017)
Majid Jalalifar, Gyung-Su Byun
An Energy-Efficient Mobile Memory I/O Interface Using Simultaneous Bidirectional Multilevel Dual-Band Signaling. IEEE Trans. Circuits Syst. II Express Briefs (8) (2017)
Nahid Mirzaie, Hossein Shamsi, Gyung-Su Byun
Automatic Design and Yield Enhancement of Data Converters. J. Circuits Syst. Comput. 26 (1) (2017)
Nahid Mirzaie, Ahmed Alzahmi, Chung-Ching Lin, Insoo Kim, Gyung-Su Byun
A low-power and performance-efficient SAR ADC design. ISOCC (2017)
Majid Jalalifar, Gyung-Su Byun
A 14.4Gb/s/pin 230fJ/b/pin/mm multi-level RF-interconnect for global network-on-chip communication. A-SSCC (2016)
Gyung-Su Byun, Mir Mohammad Navidi
A Low-Power 4-PAM Transceiver Using a Dual-Sampling Technique for Heterogeneous Latency-Sensitive Network-on-Chip. IEEE Trans. Circuits Syst. II Express Briefs (6) (2015)
Majid Jalalifar, Gyung-Su Byun
An energy-efficient mobile PAM memory interface for future 3D stacked mobile DRAMs. ISQED (2014)
Mir Mohammad Navidi, Gyung-Su Byun
Comparative analysis of clock distribution networks for TSV-based 3D IC designs. ISQED (2014)