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Gyunam Jeon
Publication Activity (10 Years)
Years Active: 2016-2019
Publications (10 Years): 8
Top Topics
Route Optimization
Vlsi Implementation
Distribution Network
Complex Data
Top Venues
MWSCAS
ISOCC
NATW
ACM Great Lakes Symposium on VLSI
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Publications
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Gyunam Jeon
,
Kyung Ki Kim
,
Yong-Bin Kim
Standing Wave Oscillator Based Clock Distribution Minimizing Equivalent Capacitance for Process and Temperature variation.
ISOCC
(2019)
Gyunam Jeon
,
Yong-Bin Kim
10 GHz Standing Wave Oscillator Based Clock Distribution Network Considering Distributed Capacitance.
MWSCAS
(2019)
Gyunam Jeon
,
Yong-Bin Kim
Area Efficient 4Gb/s Clock Data Recovery Using Improved Phase Interpolator with Error Monitor.
MWSCAS
(2018)
Yongsuk Choi
,
Gyunam Jeon
,
Yong-Bin Kim
Transceiver design for LVSTL signal interface with a low power on-chip self calibration scheme.
Integr.
63 (2018)
Gyunam Jeon
,
Yong-Bin Kim
speculative tap.
ISOCC
(2017)
Gyunam Jeon
,
Yong-Bin Kim
Switched Capacitor and Infinite Impulse Response Summation for a Quarter-Rate DFE with 4Gb/s Data Rate.
ACM Great Lakes Symposium on VLSI
(2017)
Gyunam Jeon
,
Yong-Bin Kim
A 4Gb/s half-rate DFE with switched-cap and IIR summation for data correction.
ISCAS
(2017)
Chen Zhang
,
Gyunam Jeon
,
Yongsuk Choi
,
Yong-Bin Kim
,
Kyung Ki Kim
An Area Efficient 4Gb/s Half-Rate 3-Tap DFE with Current-Integrating Summer for Data Correction.
NATW
(2016)