Gerd Spalink

Publication Activity (10 Years)

Years Active: 2022-2023
Publications (10 Years): 4

Top Topics

Digital Holography

Top Venues

IEEE J. Solid State Circuits

VLSI Technology and Circuits

Publications

Zhong Gao, Jingchu He, Martin Fritz, Jiang Gong, Yiyu Shen, Zhirui Zong, Peng Chen, Gerd Spalink, Ben Eitel, Morteza S. Alavi, Robert Bogdan Staszewski, Masoud Babaie
A Low-Spur Fractional-N PLL Based on a Time-Mode Arithmetic Unit. IEEE J. Solid State Circuits 58 (6) (2023)
Zhong Gao, Martin Fritz, Gerd Spalink, Robert Bogdan Staszewski, Masoud Babaie
A Digital PLL-Based Phase Modulator With Non-Uniform Clock Compensation and Non-linearity Predistortion. IEEE J. Solid State Circuits 58 (9) (2023)
Zhong Gao, Jingchu He, Martin Fritz, Jiang Gong, Yiyu Shen, Zhirui Zong, Peng Chen, Gerd Spalink, Ben Eitel, Ken Yamamoto, Robert Bogdan Staszewski, Morteza S. Alavi, Masoud Babaie
A 2.6-to-4.1GHz Fractional-N Digital PLL Based on a Time-Mode Arithmetic Unit Achieving -249.4dB FoM and -59dBc Fractional Spurs. ISSCC (2022)
Zhong Gao, Martin Fritz, Jingchu He, Gerd Spalink, Robert Bogdan Staszewski, Morteza S. Alavi, Masoud Babaie
A DPLL-Based Phase Modulator Achieving -46dB EVM with A Fast Two-Step DCO Nonlinearity Calibration and Non-Uniform Clock Compensation. VLSI Technology and Circuits (2022)