Login / Signup

A DPLL-Based Phase Modulator Achieving -46dB EVM with A Fast Two-Step DCO Nonlinearity Calibration and Non-Uniform Clock Compensation.

Zhong GaoMartin FritzJingchu HeGerd SpalinkRobert Bogdan StaszewskiMorteza S. AlaviMasoud Babaie
Published in: VLSI Technology and Circuits (2022)
Keyphrases
  • learning phase
  • high speed
  • np complete
  • post processing
  • camera calibration
  • database
  • first order logic
  • sat solvers
  • computer vision
  • camera parameters
  • iterative process
  • scale factor
  • sat solving