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Gerard Lassche
Publication Activity (10 Years)
Years Active: 2016-2019
Publications (10 Years): 4
Top Topics
Iterative Learning Control
Intel Xeon
Power Consumption
Clock Frequency
Top Venues
ISSCC
ESSCIRC
VLSI Circuits
IEEE J. Solid State Circuits
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Publications
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Pierluigi Cenci
,
Muhammed Bolatkale
,
Robert Rutten
,
M. Ganzerli
,
Gerard Lassche
,
Kofi A. A. Makinwa
,
Lucien J. Breems
A 3.2mW SAR-assisted CTΔ∑ ADC with 77.5dB SNDR and 40MHz BW in 28nm CMOS.
VLSI Circuits
(2019)
Pierluigi Cenci
,
Muhammed Bolatkale
,
Robert Rutten
,
Gerard Lassche
,
Kofi A. A. Makinwa
,
Lucien J. Breems
A 28 nm 2 GS/s 5-b single-channel SAR ADC with gm-boosted StrongARM comparator.
ESSCIRC
(2017)
Lucien J. Breems
,
Muhammed Bolatkale
,
Hans Brekelmans
,
Shagun Bajoria
,
Jan Niehof
,
Robert Rutten
,
Bert Oude-Essink
,
Franco Fritschij
,
Jagdip Singh
,
Gerard Lassche
15.2 A 2.2GHz continuous-time ΔΣ ADC with -102dBc THD and 25MHz BW.
ISSCC
(2016)
Lucien J. Breems
,
Muhammed Bolatkale
,
Hans Brekelmans
,
Shagun Bajoria
,
Jan Niehof
,
Robert Rutten
,
Bert Oude-Essink
,
Franco Fritschij
,
Jagdip Singh
,
Gerard Lassche
A 2.2 GHz Continuous-Time ΔΣ ADC With -102 dBc THD and 25 MHz Bandwidth.
IEEE J. Solid State Circuits
51 (12) (2016)