Georg Hager

ORCID

Publication Activity (10 Years)

Years Active: 2002-2024
Publications (10 Years): 85

Top Venues

CoRR

ISC

Concurr. Comput. Pract. Exp.

Int. J. High Perform. Comput. Appl.

Publications

Jan Laukemann, Thomas Gruber, Georg Hager, Dossay Oryspayev, Gerhard Wellein
CloverLeaf on Intel Multi-Core CPUs: A Case Study in Write-Allocate Evasion. IPDPS (2024)
Dane C. Lacey, Christie L. Alappat, Florian Lange, Georg Hager, Holger Fehske, Gerhard Wellein
Cache Blocking of Distributed-Memory Parallel Matrix Power Kernels. CoRR (2024)
Andreas Alvermann, Georg Hager, Holger Fehske
Orthogonal Layers of Parallelism in Large-Scale Eigenvalue Computations. ACM Trans. Parallel Comput. 10 (3) (2023)
Ayesha Afzal, Georg Hager, Stefano Markidis, Gerhard Wellein
Making Applications Faster by Asynchronous Execution: Slowing Down Processes or Relaxing MPI Collectives. CoRR (2023)
Georg Hager
Application Knowledge Required: Performance Modeling for Fun and Profit. ICPE (2023)
Rafael Ravedutti Lucio Machado, Jan Eitzinger, Jan Laukemann, Georg Hager, Harald Köstler, Gerhard Wellein
MD-Bench: Engineering the in-core performance of short-range molecular dynamics kernels from state-of-the-art simulation packages. CoRR (2023)
Rafael Ravedutti Lucio Machado, Jan Eitzinger, Jan Laukemann, Georg Hager, Harald Köstler, Gerhard Wellein
MD-Bench: A performance-focused prototyping harness for state-of-the-art short-range molecular dynamics algorithms. Future Gener. Comput. Syst. 149 (2023)
Ayesha Afzal, Georg Hager, Gerhard Wellein
Physical Oscillator Model for Supercomputing. CoRR (2023)
Jan Laukemann, Georg Hager
Core-Level Performance Engineering with the Open-Source Architecture Code Analyzer (OSACA) and the Compiler Explorer. ICPE (Companion) (2023)
Christie L. Alappat, Georg Hager, Olaf Schenk, Gerhard Wellein
Level-Based Blocking for Sparse Matrices: Sparse Matrix-Power-Vector Multiplication. IEEE Trans. Parallel Distributed Syst. 34 (2) (2023)
Ayesha Afzal, Georg Hager, Stefano Markidis, Gerhard Wellein
Making applications faster by asynchronous execution: Slowing down processes or relaxing MPI collectives. Future Gener. Comput. Syst. 148 (2023)
Dominik Ernst, Markus Holzer, Georg Hager, Matthias Knorr, Gerhard Wellein
Analytical performance estimation during code generation on modern GPUs. J. Parallel Distributed Comput. 173 (2023)
Ayesha Afzal, Georg Hager, Gerhard Wellein
Physical Oscillator Model for Supercomputing. SC Workshops (2023)
Christie L. Alappat, Jonas Thies, Georg Hager, Holger Fehske, Gerhard Wellein
Algebraic Temporal Blocking for Sparse Iterative Solvers on Multi-Core CPUs. CoRR (2023)
Ayesha Afzal, Georg Hager, Gerhard Wellein
SPEChpc 2021 Benchmarks on Ice Lake and Sapphire Rapids Infiniband Clusters: A Performance and Energy Case Study. SC Workshops (2023)
Jan Laukemann, Thomas Gruber, Georg Hager, Dossay Oryspayev, Gerhard Wellein
CloverLeaf on Intel Multi-Core CPUs: A Case Study in Write-Allocate Evasion. CoRR (2023)
Ayesha Afzal, Georg Hager, Gerhard Wellein
The Role of Idle Waves, Desynchronization, and Bottleneck Evasion in the Performance of Parallel Programs. IEEE Trans. Parallel Distributed Syst. 34 (2) (2023)
Ayesha Afzal, Georg Hager, Gerhard Wellein
SPEChpc 2021 Benchmarks on Ice Lake and Sapphire Rapids Infiniband Clusters: A Performance and Energy Case Study. CoRR (2023)
Christie L. Alappat, Georg Hager, Olaf Schenk, Gerhard Wellein
Level-based Blocking for Sparse Matrices: Sparse Matrix-Power-Vector Multiplication. CoRR (2022)
Ayesha Afzal, Georg Hager, Gerhard Wellein, Stefano Markidis
Exploring Techniques for the Analysis of Spontaneous Asynchronicity in MPI-Parallel Applications. CoRR (2022)
Ayesha Afzal, Gerhard Wellein, Georg Hager
Addressing White-box Modeling and Simulation Challenges in Parallel Computing. SIGSIM-PADS (2022)
Ayesha Afzal, Georg Hager, Gerhard Wellein
The Role of Idle Waves, Desynchronization, and Bottleneck Evasion in the Performance of Parallel Programs. CoRR (2022)
Christie L. Alappat, Nils Meyer, Jan Laukemann, Thomas Gruber, Georg Hager, Gerhard Wellein, Tilo Wettig
Execution-Cache-Memory modeling and performance tuning of sparse matrix-vector multiplication and Lattice quantum chromodynamics on A64FX. Concurr. Comput. Pract. Exp. 34 (20) (2022)
Ayesha Afzal, Georg Hager, Gerhard Wellein, Stefano Markidis
Exploring Techniques for the Analysis of Spontaneous Asynchronicity in MPI-Parallel Applications. PPAM (1) (2022)
Andreas Alvermann, Georg Hager, Holger Fehske
Orthogonal layers of parallelism in large-scale eigenvalue computations. CoRR (2022)
Ayesha Afzal, Georg Hager, Gerhard Wellein
Analytic performance model for parallel overlapping memory-bound kernels. Concurr. Comput. Pract. Exp. 34 (10) (2022)
Dominik Ernst, Markus Holzer, Georg Hager, Matthias Knorr, Gerhard Wellein
Analytical Performance Estimation during Code Generation on Modern GPUs. CoRR (2022)
Christie L. Alappat, Nils Meyer, Jan Laukemann, Thomas Gruber, Georg Hager, Gerhard Wellein, Tilo Wettig
ECM modeling and performance tuning of SpMV and Lattice QCD on A64FX. CoRR (2021)
Andreas Pieper, Georg Hager, Holger Fehske
A domain-specific language and matrix-free stencil code for investigating electronic properties of Dirac and topological materials. Int. J. High Perform. Comput. Appl. 35 (1) (2021)
Dominik Ernst, Georg Hager, Jonas Thies, Gerhard Wellein
Performance engineering for real and complex tall & skinny matrix multiplication kernels on GPUs. Int. J. High Perform. Comput. Appl. 35 (1) (2021)
Dominik Ernst, Georg Hager, Matthias Knorr, Gerhard Wellein, Markus Holzer
Opening the Black Box: Performance Estimation during Code Generation for GPUs. SBAC-PAD (2021)
Christie L. Alappat, Johannes Seiferth, Georg Hager, Matthias Korch, Thomas Rauber, Gerhard Wellein
YaskSite: Stencil Optimization Techniques Applied to Explicit ODE Methods on Modern Architectures. CGO (2021)
Ayesha Afzal, Georg Hager, Gerhard Wellein
Analytic Modeling of Idle Waves in Parallel Programs: Communication, Cluster Topology, and Noise Impact. CoRR (2021)
Ayesha Afzal, Georg Hager, Gerhard Wellein
Analytic Modeling of Idle Waves in Parallel Programs: Communication, Cluster Topology, and Noise Impact. ISC (2021)
Dominik Ernst, Georg Hager, Markus Holzer, Matthias Knorr, Gerhard Wellein
Opening the Black Box: Performance Estimation during Code Generation for GPUs. CoRR (2021)
Ayesha Afzal, Georg Hager, Gerhard Wellein
Desynchronization and Wave Pattern Formation in MPI-Parallel and Hybrid Memory-Bound Programs. CoRR (2020)
Francesco Cremonesi, Georg Hager, Gerhard Wellein, Felix Schürmann
Analytic performance modeling and analysis of detailed neuron simulations. Int. J. High Perform. Comput. Appl. 34 (4) (2020)
Christie L. Alappat, Johannes Hofmann, Georg Hager, Holger Fehske, Alan R. Bishop, Gerhard Wellein
Understanding HPC Benchmark Performance on Intel Broadwell and Cascade Lake Processors. ISC (2020)
Jonas Thies, Melven Röhrig-Zöllner, Nigel Overmars, Achim Basermann, Dominik Ernst, Georg Hager, Gerhard Wellein
PHIST: A Pipelined, Hybrid-Parallel Iterative Solver Toolkit. ACM Trans. Math. Softw. 46 (4) (2020)
Christie L. Alappat, Jan Laukemann, Thomas Gruber, Georg Hager, Gerhard Wellein, Nils Meyer, Tilo Wettig
Performance Modeling of Streaming Kernels and Sparse Matrix-Vector Multiplication on A64FX. PMBS@SC (2020)
Christie L. Alappat, Achim Basermann, Alan R. Bishop, Holger Fehske, Georg Hager, Olaf Schenk, Jonas Thies, Gerhard Wellein
A Recursive Algebraic Coloring Technique for Hardware-efficient Symmetric Sparse Matrix-vector Multiplication. ACM Trans. Parallel Comput. 7 (3) (2020)
Ayesha Afzal, Georg Hager, Gerhard Wellein
Desynchronization and Wave Pattern Formation in MPI-Parallel and Hybrid Memory-Bound Programs. ISC (2020)
Johannes Hofmann, Christie L. Alappat, Georg Hager, Dietmar Fey, Gerhard Wellein
Bridging the Architecture Gap: Abstracting Performance-Relevant Properties of Modern Server Processors. Supercomput. Front. Innov. 7 (2) (2020)
Christie L. Alappat, Johannes Hofmann, Georg Hager, Holger Fehske, Alan R. Bishop, Gerhard Wellein
Understanding HPC Benchmark Performance on Intel Broadwell and Cascade Lake Processors. CoRR (2020)
Ayesha Afzal, Georg Hager, Gerhard Wellein
An analytic performance model for overlapping execution of memory-bound loop kernels on multicore CPUs. CoRR (2020)
Christie L. Alappat, Jan Laukemann, Thomas Gruber, Georg Hager, Gerhard Wellein, Nils Meyer, Tilo Wettig
Performance Modeling of Streaming Kernels and Sparse Matrix-Vector Multiplication on A64FX. CoRR (2020)
Julian Hornich, Julian Hammer, Georg Hager, Thomas Gruber, Gerhard Wellein
Collecting and Presenting Reproducible Intranode Stencil Performance: INSPECT. CoRR (2019)
Francesco Cremonesi, Georg Hager, Gerhard Wellein, Felix Schürmann
Analytic Performance Modeling and Analysis of Detailed Neuron Simulations. CoRR (2019)
Faisal Shahzad, Jonas Thies, Moritz Kreutzer, Thomas Zeiser, Georg Hager, Gerhard Wellein
CRAFT: A Library for Easier Application-Level Checkpoint/Restart and Automatic Fault Tolerance. IEEE Trans. Parallel Distributed Syst. 30 (3) (2019)
Johannes Hofmann, Christie L. Alappat, Georg Hager, Dietmar Fey, Gerhard Wellein
Bridging the Architecture Gap: Abstracting Performance-Relevant Properties of Modern Server Processors. CoRR (2019)
Jan Laukemann, Julian Hammer, Georg Hager, Gerhard Wellein
Automatic Throughput and Critical Path Analysis of x86 and ARM Assembly Kernels. PMBS@SC (2019)
Jan Laukemann, Julian Hammer, Georg Hager, Gerhard Wellein
Automatic Throughput and Critical Path Analysis of x86 and ARM Assembly Kernels. CoRR (2019)
Ayesha Afzal, Georg Hager, Gerhard Wellein
Propagation and Decay of Injected One-Off Delays on Clusters: A Case Study. CLUSTER (2019)
Dominik Ernst, Georg Hager, Jonas Thies, Gerhard Wellein
Performance Engineering for a Tall & Skinny Matrix Multiplication Kernel on GPUs. CoRR (2019)
Dominik Ernst, Georg Hager, Jonas Thies, Gerhard Wellein
Performance Engineering for a Tall & Skinny Matrix Multiplication Kernels on GPUs. PPAM (1) (2019)
Christie L. Alappat, Georg Hager, Olaf Schenk, Jonas Thies, Achim Basermann, Alan R. Bishop, Holger Fehske, Gerhard Wellein
A Recursive Algebraic Coloring Technique for Hardware-Efficient Symmetric Sparse Matrix-Vector Multiplication. CoRR (2019)
Julian Hornich, Julian Hammer, Georg Hager, Thomas Gruber, Gerhard Wellein
Collecting and Presenting Reproducible Intranode Stencil Performance: INSPECT. Supercomput. Front. Innov. 6 (3) (2019)
Ayesha Afzal, Georg Hager, Gerhard Wellein
Delay Propagation and Overlapping Mechanisms on Clusters: A Case Study of Idle Periods based on Workload, Communication, and Delay Granularity. CoRR (2019)
Johannes Hofmann, Georg Hager, Dietmar Fey
On the Accuracy and Usefulness of Analytic Energy Models for Contemporary Multicore Processors. ISC (2018)
Moritz Kreutzer, Dominik Ernst, Alan R. Bishop, Holger Fehske, Georg Hager, Kengo Nakajima, Gerhard Wellein
Chebyshev Filter Diagonalization on Modern Manycore Processors and GPGPUs. ISC (2018)
Jan Laukemann, Julian Hammer, Johannes Hofmann, Georg Hager, Gerhard Wellein
Automated Instruction Stream Throughput Prediction for Intel and AMD Microarchitectures. CoRR (2018)
Moritz Kreutzer, Georg Hager, Dominik Ernst, Holger Fehske, Alan R. Bishop, Gerhard Wellein
Chebyshev Filter Diagonalization on Modern Manycore Processors and GPGPUs. CoRR (2018)
Jan Laukemann, Julian Hammer, Johannes Hofmann, Georg Hager, Gerhard Wellein
Automated Instruction Stream Throughput Prediction for Intel and AMD Microarchitectures. PMBS@SC (2018)
Faisal Shahzad, Moritz Kreutzer, Thomas Zeiser, Rui Machado, Andreas Pieper, Georg Hager, Gerhard Wellein
Building and utilizing fault tolerance support tools for the GASPI applications. Int. J. High Perform. Comput. Appl. 32 (5) (2018)
Georg Hager, Gerhard Wellein
Performance Engineering. Inform. Spektrum 41 (5) (2018)
Johannes Hofmann, Georg Hager, Dietmar Fey
On the accuracy and usefulness of analytic energy models for contemporary multicore processors. CoRR (2018)
Markus Wittmann, Georg Hager, Radim Janalík, Martin Lanser, Axel Klawonn, Oliver Rheinbach, Olaf Schenk, Gerhard Wellein
Multicore Performance Engineering of Sparse Triangular Solves Using a Modified Roofline Model. SBAC-PAD (2018)
Tareq M. Malas, Georg Hager, Hatem Ltaief, David E. Keyes
Multidimensional Intratile Parallelization for Memory-Starved Stencil Computations. ACM Trans. Parallel Comput. 4 (3) (2018)
Faisal Shahzad, Jonas Thies, Moritz Kreutzer, Thomas Zeiser, Georg Hager, Gerhard Wellein
CRAFT: A library for easier application-level Checkpoint/Restart and Automatic Fault Tolerance. CoRR (2017)
Thomas Röhl, Jan Eitzinger, Georg Hager, Gerhard Wellein
LIKWID Monitoring Stack: A flexible framework enabling job specific performance monitoring for the masses. CoRR (2017)
Thomas Röhl, Jan Eitzinger, Georg Hager, Gerhard Wellein
LIKWID Monitoring Stack: A Flexible Framework Enabling Job Specific Performance monitoring for the masses. CLUSTER (2017)
Johannes Hofmann, Dietmar Fey, Michael Riedmann, Jan Eitzinger, Georg Hager, Gerhard Wellein
Performance analysis of the Kahan-enhanced scalar product on current multi-core and many-core processors. Concurr. Comput. Pract. Exp. 29 (9) (2017)
Thomas Röhl, Jan Eitzinger, Georg Hager, Gerhard Wellein
Validation of hardware events for successful performance pattern identification in High Performance Computing. CoRR (2017)
Johannes Hofmann, Georg Hager, Gerhard Wellein, Dietmar Fey
An Analysis of Core- and Chip-Level Architectural Features in Four Generations of Intel Server Processors. ISC (2017)
Julian Hammer, Jan Eitzinger, Georg Hager, Gerhard Wellein
Kerncraft: A Tool for Analytic Performance Modeling of Loop Kernels. CoRR (2017)
Andreas Pieper, Georg Hager, Holger Fehske
PVSC-DTM: A domain-specific language and matrix-free stencil code for investigating electronic properties of Dirac and topological materials. CoRR (2017)
Moritz Kreutzer, Jonas Thies, Melven Röhrig-Zöllner, Andreas Pieper, Faisal Shahzad, Martin Galgon, Achim Basermann, Holger Fehske, Georg Hager, Gerhard Wellein
GHOST: Building Blocks for High Performance Sparse Linear Algebra on Heterogeneous Systems. Int. J. Parallel Program. 45 (5) (2017)
Johannes Hofmann, Georg Hager, Gerhard Wellein, Dietmar Fey
An analysis of core- and chip-level architectural features in four generations of Intel server processors. CoRR (2017)
Johannes Hofmann, Dietmar Fey, Jan Eitzinger, Georg Hager, Gerhard Wellein
Analysis of Intel's Haswell Microarchitecture Using the ECM Model and Microbenchmarks. ARCS (2016)
Andreas Pieper, Moritz Kreutzer, Andreas Alvermann, Martin Galgon, Holger Fehske, Georg Hager, Bruno Lang, Gerhard Wellein
High-performance implementation of Chebyshev filter diagonalization for interior eigenvalue computations. J. Comput. Phys. 325 (2016)
Markus Wittmann, Georg Hager, Thomas Zeiser, Jan Treibig, Gerhard Wellein
Chip-level and multi-node analysis of energy-optimized lattice Boltzmann CFD simulations. Concurr. Comput. Pract. Exp. 28 (7) (2016)
Tareq M. Malas, Julian Hornich, Georg Hager, Hatem Ltaief, Christoph Pflaum, David E. Keyes
Optimization of an Electromagnetics Code with Multicore Wavefront Diamond Blocking and Multi-dimensional Intra-Tile Parallelization. IPDPS (2016)
Georg Hager, Jan Treibig, Johannes Habich, Gerhard Wellein
Exploring performance and power properties of modern multi-core chips via simple machine models. Concurr. Comput. Pract. Exp. 28 (2) (2016)
Johannes Hofmann, Dietmar Fey, Michael Riedmann, Jan Eitzinger, Georg Hager, Gerhard Wellein
Performance analysis of the Kahan-enhanced scalar product on current multi- and manycore processors. CoRR (2016)
Georg Hager, Darren J. Kerbyson, Abhinav Vishnu, Gerhard Wellein
Performance and power for highly parallel systems. Concurr. Comput. Pract. Exp. 28 (2) (2016)
Johannes Hofmann, Dietmar Fey, Jan Eitzinger, Georg Hager, Gerhard Wellein
Performance analysis of the Kahan-enhanced scalar product on current multicore processors. CoRR (2015)
Melven Röhrig-Zöllner, Jonas Thies, Moritz Kreutzer, Andreas Alvermann, Andreas Pieper, Achim Basermann, Georg Hager, Gerhard Wellein, Holger Fehske
Increasing the Performance of the Jacobi-Davidson Method by Blocking. SIAM J. Sci. Comput. 37 (6) (2015)
Moritz Kreutzer, Andreas Pieper, Georg Hager, Gerhard Wellein, Andreas Alvermann, Holger Fehske
Performance Engineering of the Kernel Polynomal Method on Large-Scale CPU-GPU Systems. IPDPS (2015)
Faisal Shahzad, Moritz Kreutzer, Thomas Zeiser, Rui Machado, Andreas Pieper, Georg Hager, Gerhard Wellein
Building a Fault Tolerant Application Using the GASPI Communication Layer. CLUSTER (2015)
Tareq M. Malas, Julian Hornich, Georg Hager, Hatem Ltaief, Christoph Pflaum, David E. Keyes
Optimization of an electromagnetics code with multicore wavefront diamond blocking and multi-dimensional intra-tile parallelization. CoRR (2015)
Julian Hammer, Georg Hager, Jan Eitzinger, Gerhard Wellein
Automatic Loop Kernel Analysis and Performance Modeling With Kerncraft. CoRR (2015)
Faisal Shahzad, Moritz Kreutzer, Thomas Zeiser, Rui Machado, Andreas Pieper, Georg Hager, Gerhard Wellein
Building a fault tolerant application using the GASPI communication layer. CoRR (2015)
Johannes Hofmann, Dietmar Fey, Michael Riedmann, Jan Eitzinger, Georg Hager, Gerhard Wellein
Performance Analysis of the Kahan-Enhanced Scalar Product on Current Multicore Processors. PPAM (1) (2015)
Andreas Pieper, Moritz Kreutzer, Martin Galgon, Andreas Alvermann, Holger Fehske, Georg Hager, Bruno Lang, Gerhard Wellein
High-performance implementation of Chebyshev filter diagonalization for interior eigenvalue computations. CoRR (2015)
Markus Wittmann, Thomas Zeiser, Georg Hager, Gerhard Wellein
Short Note on Costs of Floating Point Operations on current x86-64 Architectures: Denormals, Overflow, Underflow, and Division by Zero. CoRR (2015)
Julian Hammer, Georg Hager, Jan Eitzinger, Gerhard Wellein
Automatic loop kernel analysis and performance modeling with Kerncraft. PMBS@SC (2015)
Johannes Hofmann, Dietmar Fey, Jan Eitzinger, Georg Hager, Gerhard Wellein
Analysis of Intel's Haswell Microarchitecture Using The ECM Model and Microbenchmarks. CoRR (2015)
Holger Stengel, Jan Treibig, Georg Hager, Gerhard Wellein
Quantifying Performance Bottlenecks of Stencil Computations Using the Execution-Cache-Memory Model. ICS (2015)
Tareq M. Malas, Georg Hager, Hatem Ltaief, David E. Keyes
Multi-dimensional intra-tile parallelization for memory-starved stencil computations. CoRR (2015)
Tareq M. Malas, Georg Hager, Hatem Ltaief, Holger Stengel, Gerhard Wellein, David E. Keyes
Multicore-Optimized Wavefront Diamond Blocking for Optimizing Stencil Updates. SIAM J. Sci. Comput. 37 (4) (2015)

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Publication Activity (10 Years)

Top Topics

Top Venues

Georg Hager