Gareth W. Morris

Publication Activity (10 Years)

Years Active: 2004-2009
Publications (10 Years): 0

Publications

Gareth W. Morris, David B. Thomas, Wayne Luk
FPGA Accelerated Low-Latency Market Data Feed Processing. Hot Interconnects (2009)
Gareth W. Morris, George A. Constantinides, Peter Y. K. Cheung
ROM to DSP block transfer for resource constrained synthesis. IET Comput. Digit. Tech. 1 (1) (2007)
Gareth W. Morris, Matthew Aubury
Design Space Exploration of the European Option Benchmark Using HyperStreams. FPL (2007)
Gareth W. Morris, George A. Constantinides, Peter Y. K. Cheung
Using DSP Blocks For ROM Replacement: A Novel Synthesis Flow. FPL (2005)
Gareth W. Morris, George A. Constantinides, Peter Y. K. Cheung
Migrating Functionality from ROMS to Embedded Multipliers. FCCM (2004)