Elham Safi

Publication Activity (10 Years)

Years Active: 2003-2011
Publications (10 Years): 0

Publications

Elham Safi, Andreas Moshovos, Andreas G. Veneris
Two-Stage, Pipelined Register Renaming. IEEE Trans. Very Large Scale Integr. Syst. 19 (10) (2011)
Elham Safi, Andreas Moshovos, Andreas G. Veneris
On the Latency and Energy of Checkpointed Superscalar Register Alias Tables. IEEE Trans. Very Large Scale Integr. Syst. 18 (3) (2010)
Elham Safi, Andreas Moshovos, Andreas G. Veneris
A physical-level study of the compacted matrix instruction scheduler for dynamically-scheduled superscalar processors. ICSAMOS (2009)
Elham Safi, Andreas Moshovos, Andreas G. Veneris
A physical level study and optimization of CAM-based checkpointed register alias table. ISLPED (2008)
Elham Safi, Andreas Moshovos, Andreas G. Veneris
L-CBF: A Low-Power, Fast Counting Bloom Filter Architecture. IEEE Trans. Very Large Scale Integr. Syst. 16 (6) (2008)
Jason Zebchuk, Elham Safi, Andreas Moshovos
A Framework for Coarse-Grain Optimizations in the On-Chip Memory Hierarchy. MICRO (2007)
Elham Safi, Patrick Akl, Andreas Moshovos, Andreas G. Veneris, Aggeliki Arapoyanni
On the latency, energy and area of checkpointed, superscalar register alias tables. ISLPED (2007)
Elham Safi, Andreas Moshovos, Andreas G. Veneris
L-CBF: a low-power, fast counting bloom filter architecture. ISLPED (2006)
Elham Safi, Zohreh Karimi, Maghsoud Abbaspour, Zainalabedin Navabi
Utilizing Various ADL Facets for Instruction Level CPU Test. MTV (2003)
Elham Safi, Reihaneh Saberi, Zohreh Karimi, Zainalabedin Navabi
Processor Testing Using an ADL Description and Genetic Algorithms. VLSI-SOC (2003)