Daniel L. Ostapko

Publication Activity (10 Years)

Years Active: 1968-2005
Publications (10 Years): 0

Publications

Subhrajit Bhattacharya, John A. Darringer, Daniel L. Ostapko, Youngsoo Shin
A Mask Reuse Methodology for Reducing System-on-a-Chip Cost. ISQED (2005)
Howard Chen, Daniel L. Ostapko
Modeling Temporal and Spatial Power Supply Voltage Variation for Timing Analysis. PATMOS (2004)
Jin-Fuw Lee, Daniel L. Ostapko, Jeffery Soreff, C. K. Wong
On the Signal Bounding Problem in Timing Analysis. ICCAD (2001)
Daniel L. Ostapko
A Mapping and Memory Chip Hardware which Provides Symmetric Reading/Writing of Horizontal and Vertical Lines. IBM J. Res. Dev. 28 (4) (1984)
Leon I. Maissel, Daniel L. Ostapko
Interactive design language: A unified approach to hardware simulation, synthesis and documentation. DAC (1982)
Se June Hong, Daniel L. Ostapko
A Simple Procedure to Generate Optimum Test Patterns for Parity Logic Networks. IEEE Trans. Computers 30 (5) (1981)
Daniel L. Ostapko, Se June Hong
Fault Analysis and Test Generation for Programmable Logic Arrays (PLA's). IEEE Trans. Computers 28 (9) (1979)
Se June Hong, Daniel L. Ostapko
Codes for Self-Clocking, AC-Coupled Transmission: Aspects of Synthesis and Analysis. IBM J. Res. Dev. 19 (4) (1975)
Daniel L. Ostapko
Analysis of algorithms implemented in software and hardware. ACM Annual Conference (2) (1974)
Se June Hong, Robert G. Cain, Daniel L. Ostapko
MINI: A Heuristic Approach for Logic Minimization. IBM J. Res. Dev. 18 (5) (1974)
Daniel L. Ostapko
On deriving a relation between circuits and input/output by analyzing an equivalent program. ACM SIGPLAN Notices 9 (6) (1974)
Daniel L. Ostapko, Se June Hong
Generating Test Examples for Heuristic Boolean Minimization. IBM J. Res. Dev. 18 (5) (1974)
Se June Hong, Daniel L. Ostapko
On Complementation of Boolean Functions. IEEE Trans. Computers 21 (9) (1972)
Douglas C. Bossen, Daniel L. Ostapko, Arvind M. Patel, Martin S. Schmookler
Minimum test patterns for residue networks. DAC (1971)
Douglas C. Bossen, Daniel L. Ostapko, Arvind M. Patel
Optimum test patterns for parity networks. AFIPS Fall Joint Computing Conference (1970)
Daniel L. Ostapko, Stephen S. Yau
Realization of an Arbitrary Switching Function with a Two-Level Network of Threshold and Parity Elements. IEEE Trans. Computers 19 (3) (1970)
Stephen Sik-Sang Yau, Daniel L. Ostapko
Realization of a Class of Switching Functions by Threshold-Logic Networks. IEEE Trans. Computers 17 (4) (1968)