A Mapping and Memory Chip Hardware which Provides Symmetric Reading/Writing of Horizontal and Vertical Lines.
Daniel L. OstapkoPublished in: IBM J. Res. Dev. (1984)
Keyphrases
- low cost
- memory subsystem
- processor core
- memory access
- vlsi implementation
- computing power
- single chip
- programmable logic
- multithreading
- ibm zenterprise
- digital signal processors
- speculative execution
- host computer
- memory management
- circuit design
- ibm power processor
- memory bandwidth
- reading comprehension
- high speed
- writing skills
- chip design
- evolvable hardware
- student progress
- hardware and software
- computational power
- parallel hardware
- memory requirements
- random access memory
- internal memory
- real time
- line segments
- level parallelism
- high density
- signal processor
- hough transform
- operating system
- input output
- floating point arithmetic
- processing elements
- reconfigurable hardware
- low power consumption
- memory hierarchy
- instruction set
- associative memory
- computer systems
- hardware architecture
- low power
- gigabit ethernet
- external memory
- random access
- massively parallel
- hardware implementation