Cong Shi

Publication Activity (10 Years)

Years Active: 2013-2024
Publications (10 Years): 39

Top Topics

Array Processor

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

Sci. China Inf. Sci.

Publications

Siyuan Wei, Ke Ning, Lei Kang, Xuemin Zheng, Mingxin Zhao, Mengmeng Xu, Shuyu Wang, Xuanzhe Xu, Runjiang Dou, Shuangming Yu, Xu Yang, Jian Liu, Cong Shi, Nanjian Wu, Liyuan Liu
A Real-Time 2D/3D Perception Visual Vector Processor for 1920 × 1080 High-Resolution High-Speed Intelligent Vision Chips. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (2) (2024)
Tengxiao Wang, Min Tian, Zhengqing Zhong, Haibing Wang, Junxian He, Fang Tang, Xichuan Zhou, Shuangming Yu, Nanjian Wu, Liyuan Liu, Cong Shi
27μJ/image Digital Edge Neuromorphic Chip with On-Chip 802 Frame/s Multi-Layer Spiking Neural Network Learning. A-SSCC (2023)
Cong Shi, Jingya Zhang, Tengxiao Wang, Zhengqing Zhong, Junxian He, Haoran Gao, Jianyi Yu, Ping Li, Min Tian
An Edge Neuromorphic Hardware With Fast On-Chip Error-Triggered Learning on Compressive Sensed Spikes. IEEE Trans. Circuits Syst. II Express Briefs 70 (7) (2023)
Xiandong Zhao, Ying Wang, Cheng Liu, Cong Shi, Kaijie Tu, Lei Zhang
Network Pruning for Bit-Serial Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (5) (2023)
Zhengqing Zhong, Tengxiao Wang, Haibing Wang, Zhihua Zhou, Junxian He, Fang Tang, Xichuan Zhou, Shuangming Yu, Liyuan Liu, Nanjian Wu, Min Tian, Cong Shi
Live Demonstration: Face Recognition at The Edge Using Fast On-Chip Deep Learning Neuromorphic Chip. AICAS (2023)
Lei Kang, Xu Yang, Chi Zhang, Shuangming Yu, Runjiang Dou, Wenchang Li, Cong Shi, Jian Liu, Nanjian Wu, Liyuan Liu
A 24.3 μJ/Image SNN Accelerator for DVS-Gesture With WS-LOS Dataflow and Sparse Methods. IEEE Trans. Circuits Syst. II Express Briefs 70 (11) (2023)
Cong Shi, Li Wang, Haoran Gao, Min Tian
Learnable Leakage and Onset-Spiking Self-Attention in SNNs with Local Error Signals. Sensors 23 (24) (2023)
Leyi Chen, Cong Shi, Junxian He, Jianyi Yu, Haibing Wang, Jing Lu, Liyuan Liu, Nanjian Wu, Min Tian
An 8-T Processing-in-Memory SRAM Cell-Based Pixel-Parallel Array Processor for Vision Chips. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (11) (2023)
Fuming Lei, Xu Yang, Jian Liu, Nanjian Wu, Cong Shi, Runjiang Dou, Liyuan Liu
A Lightweight Integer-STBP On-Chip Learning Method of Spiking Neural Networks For Edge Processors. ICTA (2023)
Cong Shi, Junxian He, Shrinivas J. Pundlik, Xichuan Zhou, Nanjian Wu, Gang Luo
Low-cost real-time VLSI system for high-accuracy optical flow estimation using biological motion features and random forests. Sci. China Inf. Sci. 66 (5) (2023)
Tengxiao Wang, Haibing Wang, Junxian He, Zhengqing Zhong, Fang Tang, Xichuan Zhou, Shuangming Yu, Liyuan Liu, Nanjian Wu, Min Tian, Cong Shi
MorphBungee: An Edge Neuromorphic Chip for High-Accuracy On-Chip Learning of Multiple-Layer Spiking Neural Networks. BioCAS (2022)
Haibing Wang, Zhen He, Tengxiao Wang, Junxian He, Xichuan Zhou, Ying Wang, Liyuan Liu, Nanjian Wu, Min Tian, Cong Shi
TripleBrain: A Compact Neuromorphic Hardware Core With Fast On-Chip Self-Organizing and Reinforcement Spike-Timing Dependent Plasticity. IEEE Trans. Biomed. Circuits Syst. 16 (4) (2022)
Leyi Chen, Junxian He, Jianyi Yu, Haibing Wang, Jing Lu, Liyuan Liu, Nanjian Wu, Cong Shi, Min Tian
An 8-T Processing-in-Memory SRAM Cell-Based Pixel-Parallel Array Processor for Vision Chips. APCCAS (2022)
Min Tian, Jing Lu, Haoran Gao, Haibing Wang, Jianyi Yu, Cong Shi
A Lightweight Spiking GAN Model for Memristor-centric Silicon Circuit with On-chip Reinforcement Adversarial Learning. ISCAS (2022)
Zhen He, Cong Shi, Tengxiao Wang, Ying Wang, Min Tian, Xichuan Zhou, Ping Li, Liyuan Liu, Nanjian Wu, Gang Luo
A Low-Cost FPGA Implementation of Spiking Extreme Learning Machine With On-Chip Reward-Modulated STDP Learning. IEEE Trans. Circuits Syst. II Express Briefs 69 (3) (2022)
Ying Wang, Yongchen Wang, Cong Shi, Long Cheng, Huawei Li, Xiaowei Li
An Edge 3D CNN Accelerator for Low-Power Activity Recognition. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (5) (2021)
Tengxiao Wang, Cong Shi, Xichuan Zhou, Yingcheng Lin, Junxian He, Ping Gan, Ping Li, Ying Wang, Liyuan Liu, Nanjian Wu, Gang Luo
CompSNN: A lightweight spiking neural network based on spatiotemporally compressive spike features. Neurocomputing 425 (2021)
Xichuan Zhou, Kui Liu, Cong Shi, Haijun Liu, Ji Liu
Optimizing Information Theory Based Bitwise Bottlenecks for Efficient Mixed-Precision Activation Quantization. AAAI (2021)
Yingcheng Lin, Rui Li, Wei He, Xichuan Zhou, Junxian He, Ping Li, Liyuan Liu, Nanjian Wu, Cong Shi
A Pixel-Parallel Array Processor without Computational Logic for Computational Image Sensors. ICTA (2021)
Ling Zhang, Jing Yang, Cong Shi, Yingcheng Lin, Wei He, Xichuan Zhou, Xu Yang, Liyuan Liu, Nanjian Wu
A Cost-Efficient High-Speed VLSI Architecture for Spiking Convolutional Neural Network Inference Using Time-Step Binary Spike Maps. Sensors 21 (18) (2021)
Kai Qin, Fangyuan Ge, Yingjun Zhao, Ling Zhu, Ming Li, Cong Shi, Dong Li, Xichuan Zhou
Hapke Data Augmentation for Deep Learning-Based Hyperspectral Data Analysis With Limited Samples. IEEE Geosci. Remote. Sens. Lett. 18 (5) (2021)
Wei He, Jie Zhang, Yingcheng Lin, Xichuan Zhou, Ping Li, Liyuan Liu, Nanjian Wu, Cong Shi
A Low-Cost High-Speed Object Tracking VLSI System Based on Unified Textural and Dynamic Compressive Features. IEEE Trans. Circuits Syst. II Express Briefs 68 (3) (2021)
Haibing Wang, Zhen He, Jinsong Rao, Tengxiao Wang, Junxian He, Min Tian, Xichuan Zhou, Liyuan Liu, Nanjian Wu, Cong Shi
TripleBrain: An Edge Neuromorphic Architecture for High-accuracy Single-layer Spiking Neural Network with On-chip Self-organizing and Reinforcement Learning. ICTA (2021)
Cong Shi, Tengxiao Wang, Junxian He, Jianghao Zhang, Liyuan Liu, Nanjian Wu
DeepTempo: A Hardware-Friendly Direct Feedback Alignment Multi-Layer Tempotron Learning Rule for Deep Spiking Neural Networks. IEEE Trans. Circuits Syst. II Express Briefs 68 (5) (2021)
Xichuan Zhou, Zhenghua Zhou, Zhengqing Zhong, Jianyi Yu, Tengxiao Wang, Min Tian, Ying Jiang, Cong Shi
A Heterogeneous Spiking Neural Network for Computationally Efficient Face Recognition. ISCAS (2021)
Cong Shi, Jing Lu, Ying Wang, Ping Li, Min Tian
Exploiting Memristors for Neuromorphic Reinforcement Learning. AICAS (2021)
Xiandong Zhao, Ying Wang, Cheng Liu, Cong Shi, Kaijie Tu, Lei Zhang
BitPruner: Network Pruning for Bit-serial Accelerators. DAC (2020)
Xichuan Zhou, Yicong Peng, Chunqiao Long, Fengbo Ren, Cong Shi
MoNet3D: Towards Accurate Monocular 3D Object Localization in Real Time. ICML (2020)
Xichuan Zhou, Yicong Peng, Chunqiao Long, Fengbo Ren, Cong Shi
MoNet3D: Towards Accurate Monocular 3D Object Localization in Real Time. CoRR (2020)
Yingcheng Lin, Rui Li, Wei He, Xichuan Zhou, Junxian He, Ping Li, Ying Jiang, Liyuan Liu, Nanjian Wu, Cong Shi
A High-speed Low-cost CNN Inference Accelerator for Depthwise Separable Convolution. ICTA (2020)
Wei He, Jinguo Huang, Tengxiao Wang, Yingcheng Lin, Junxian He, Xichuan Zhou, Ping Li, Ying Wang, Nanjian Wu, Cong Shi
A High-Speed Low-Cost VLSI System Capable of On-Chip Online Learning for Dynamic Vision Sensor Data Classification. Sensors 20 (17) (2020)
Xichuan Zhou, Kui Liu, Cong Shi, Haijun Liu, Ji Liu
Neural Network Activation Quantization with Bitwise Information Bottlenecks. CoRR (2020)
Junxian He, Xichuan Zhou, Yingcheng Lin, Chonglei Sun, Cong Shi, Nanjian Wu, Gang Luo
20, 000-fps Visual Motion Magnification on Pixel-parallel Vision Chip. ASICON (2019)
Cong Shi, Zhuoran Dong, Shrinivas J. Pundlik, Gang Luo
A Hardware-Friendly Optical Flow-Based Time-to-Collision Estimation Algorithm. Sensors 19 (4) (2019)
Jinguo Huang, Yingcheng Lin, Wei He, Xichuan Zhou, Cong Shi, Nanjian Wu, Gang Luo
High-speed Classification of AER Data Based on a Low-cost Hardware System. ASICON (2019)
Yongchen Wang, Ying Wang, Huawei Li, Cong Shi, Xiaowei Li
Systolic Cube: A Spatial 3D CNN Accelerator Architecture for Low Power Video Analysis. DAC (2019)
Cong Shi, Jiajun Li, Ying Wang, Gang Luo
Exploiting Lightweight Statistical Learning for Event-Based Vision Processing. IEEE Access 6 (2018)
Cong Shi, Gang Luo
A Streaming Motion Magnification Core for Smart Image Sensors. IEEE Trans. Circuits Syst. II Express Briefs (9) (2018)
Cong Shi, Gang Luo
A Compact VLSI System for Bio-Inspired Visual Motion Estimation. IEEE Trans. Circuits Syst. Video Technol. 28 (4) (2018)
Yangfan Zhou, Zhongxiang Cao, Ye Han, Quanliang Li, Cong Shi, Runjiang Dou, Qi Qin, Jian Liu, Nanjian Wu
A low power global shutter pixel with extended FD voltage swing range for large format high speed CMOS image sensor. Sci. China Inf. Sci. 58 (4) (2015)
Cong Shi, Jie Yang, Ye Han, Zhongxiang Cao, Qi Qin, Liyuan Liu, Nanjian Wu, Zhihua Wang
A 1000 fps Vision Chip Based on a Dynamically Reconfigurable Hybrid Architecture Comprising a PE Array Processor and Self-Organizing Map Neural Network. IEEE J. Solid State Circuits 49 (9) (2014)
Yangfan Zhou, Zhongxiang Cao, Qi Qin, Quanliang Li, Cong Shi, Nanjian Wu
A high speed 1000 fps CMOS image sensor with low noise global shutter pixels. Sci. China Inf. Sci. 57 (4) (2014)
Cong Shi, Jie Yang, Nanjian Wu, ZhiHua Wang
A high speed multi-level-parallel array processor for vision chips. Sci. China Inf. Sci. 57 (6) (2014)
Cong Shi, Jie Yang, Liyuan Liu, Nanjian Wu, ZhiHua Wang
A massively parallel keypoint detection and description (MP-KDD) algorithm for high-speed vision chip. Sci. China Inf. Sci. 57 (10) (2014)
Cong Shi, Jie Yang, Ye Han, Zhongxiang Cao, Qi Qin, Liyuan Liu, Nanjian Wu, Zhihua Wang
7.3 A 1000fps vision chip based on a dynamically reconfigurable hybrid architecture comprising a PE array and self-organizing map neural network. ISSCC (2014)
Zhe Chen, Jie Yang, Cong Shi, Nanjian Wu
A novel architecture of local memory for programmable SIMD vision chip. ASICON (2013)