Cagla Cakir

Publication Activity (10 Years)

Years Active: 2010-2019
Publications (10 Years): 2

Top Topics

Significantly Lower

Real And Synthetic Datasets

Top Venues

Publications

Cagla Cakir, Andy W. Chen, Y. K. Chong, Sriram Thyagarajan, Mark P. McCartney, Peixuan Tan, Yulin Shi, Mudit Bhargava
A 4GHz 16nm SRAM Architecture with Low-Power Features for Heterogeneous Computing Platforms. VLSI Circuits (2019)
Cagla Cakir, Ron Ho, Jon K. Lexau, Ken Mai
Scalable High-Radix Modular Crossbar Switches. Hot Interconnects (2016)
Michael Papamichael, Cagla Cakir, Chen Sun, Chia-Hsin Owen Chen, James C. Hoe, Ken Mai, Li-Shiuan Peh, Vladimir Stojanovic
DELPHI: a framework for RTL-based architecture design evaluation using DSENT models. ISPASS (2015)
Cagla Cakir, Ron Ho, Jon K. Lexau, Ken Mai
Modeling and Design of High-Radix On-Chip Crossbar Switches. NOCS (2015)
Burak Erbagci, Fangfei Liu, Cagla Cakir, Nail Etkin Can Akkaya, Ruby B. Lee, Ken Mai
A 32kB secure cache memory with dynamic replacement mapping in 65nm bulk CMOS. A-SSCC (2015)
Cagla Cakir, Ron Ho, Jon K. Lexau, Ken Mai
High-efficiency crossbar switches using capacitively coupled signaling. ISLPED (2015)
Cagla Cakir, Mudit Bhargava, Ken Mai
6T SRAM and 3T DRAM data retention and remanence characterization in 65nm bulk CMOS. CICC (2012)
Mudit Bhargava, Cagla Cakir, Ken Mai
Reliability enhancement of bi-stable PUFs in 65nm bulk CMOS. HOST (2012)
Mudit Bhargava, Cagla Cakir, Ken Mai
Comparison of bi-stable and delay-based Physical Unclonable Functions from measurements in 65nm bulk CMOS. CICC (2012)
Tevfik Zafer Ozcan, Cagla Cakir, Mert Cetin, Ilker Hamzaoglu
An Overlapped Block Motion Compensation Hardware for Frame Rate Conversion. DSD (2011)
Mudit Bhargava, Cagla Cakir, Ken Mai
Attack Resistant Sense Amplifier based PUFs (SA-PUF) with Deterministic and Controllable Reliability of PUF Responses. HOST (2010)